Varnitronics
74HCT4052PW,118 Nexperia
Nexperia

74HCT4052PW,118

2 70Ω TSSOP-16 Analog Switches, Multiplexers, Demultiplexers RoHS

TSSOP-16ROHS3 CompliantActive

Dual 4-channel analog multiplexer/demultiplexer

Manufacturer
Nexperia
Manufacturer part #
74HCT4052PW,118
Store part #
C87681
Package / case
TSSOP-16
Packaging
Tape & Reel (TR)
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

2,711 in stock

#C87681

Stock & price checked 5 days ago

QuantityUnit pricePack price
1+₹106.05₹106.05
10+₹85.40₹854.00
30+₹75.19₹2,255.70
100+₹64.97₹6,497.00
500+₹58.68₹29,340.00
1,000+₹55.63₹55,630.00

1 × ₹106.05

₹106.05

excl. GST

₹125.14 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 7–10 working days
  • GST invoice with every order
  • Standard pack: 2,500 per reel

74HCT4052PW,118

₹106.05 for 1 + GST

Specifications

Features
Bidirectional analog channel;Level shifting;Glitch-free switching
Operating Temperature
-40℃~+125℃
Number of Channels
2
Voltage - Supply
4.5V~5.5V;-5V~5V
Ron
70Ω
Propagation Delay
10ns
Con
5pF

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
EAR99
Packaging
Tape & Reel (TR)
Standard pack
2,500 / Reel
Sold per
Piece
Minimum order
1
Unit weight
0.232 g

Overview

The 74HC4052; 74HCT4052 is a dual single-pole quad-throw analog switch (2×SP4T) suitable for use in analog or digital 4:1 multiplexer/demultiplexer applications. Each switch features four independent inputs/outputs (nY0, nY1, nY2 and nY3) and a common input/output (nZ). A digital enable input (E) and two digital select inputs (S0 and S1) are common to both switches. When E is HIGH, the switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Applications

  • Analog multiplexing and demultiplexing
  • Digital multiplexing and demultiplexing
  • Signal gating

Key features

  • Wide analog input voltage range from -5 V to +5 V
  • CMOS low power dissipation
  • High noise immunity
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Low ON resistance:
  • 80 Ω (typical) at VCC - VEE = 4.5 V
  • 70 Ω (typical) at VCC - VEE = 6.0 V
  • 60 Ω (typical) at VCC - VEE = 9.0 V
  • Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals
  • Typical ‘break before make’ built-in
  • Complies with JEDEC standards:
  • JESD8C (2.7 V to 3.6 V)
  • JESD7A (2.0 V to 6.0 V)
  • Input levels:
  • For 74HC4052: CMOS level
  • For 74HCT4052: TTL level
  • ESD protection:
  • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
  • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
  • Specified from -40 °C to +85 °C and -40 °C to +125 °C

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