WCH

CH394Q

LQFP-48(7x7) Interface Controllers

LQFP-48(7x7)RoHSActive

Ethernet protocol stack chip

Manufacturer: WCH
Manufacturer part #: CH394Q
Store part #: C46061830
Package / case: LQFP-48(7x7)
Category: Interface Controllers
Packaging: Tray

Datasheet (PDF)

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1,097 in stock

#C46061830

Stock & price checked 5 days ago

Quantity	Unit price	Pack price
1+	₹382.70	₹382.70
10+	₹325.01	₹3,250.10
30+	₹289.09	₹8,672.70
250+	₹252.08	₹63,020.00
500+	₹235.32	₹1,17,660.00
1,000+	₹228.14	₹2,28,140.00

Quantity (min 1)

1 × ₹382.70

₹382.70

excl. GST

₹451.59 incl. 18% GST

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Standard pack: 250 per tray

CH394Q

₹382.70 for 1 + GST

Specifications

Voltage - Supply: 3.3V;2.5V;1.8V
Integrated PHY: Yes
Features: Wake-up function;Low-power mode;Programmable LED indication
Protocol: SPI
Memory Space: 32KB
Ethernet Speed Standards: 10BASE-T;100BASE-TX

Packaging & compliance

RoHS: RoHS
Lifecycle: Active
Packaging: Tray
Standard pack: 250 / Tray
Sold per: Piece
Minimum order: 1
Unit weight: 1.549 g

Overview

CH394 is an Ethernet protocol stack management chip designed for microcontroller systems to enable Ethernet communication. The chip integrates a 10/100M Ethernet MAC layer and PHY transceiver, is fully compliant with IEEE 802.3, and embeds firmware for Ethernet protocol stacks including IP, ARP, ICMP, IGMP, UDP, and TCP. Microcontroller systems can easily perform network communication via CH394. CH394 supports Wake-on-LAN mode and power-down mode. CH394Q offers two operating modes: IPv4 mode and IPv6 mode. The default mode is IPv4 mode, supporting multiple network protocols including IPv4, ARP, ICMP, IGMP, UDP, and TCP; IPv6 mode additionally supports IPv6, ICMPv6, IPRAW4, and IPRAW6. CH394Q provides an SPI interface, while CH394L provides both an SPI interface and an 8-bit passive parallel interface. Controllers such as microcontrollers, DSPs, MCUs, or MPUs can control CH394Q for Ethernet communication via the SPI interface, or control CH394L for Ethernet communication via either the SPI interface or the 8-bit parallel interface.

Key features

Integrated Ethernet MAC and PHY transceiver
10/100M speed, full/half-duplex auto-negotiation, IEEE802.3 compliant
MDI/MDIX auto-crossover
I/O supports 3.3V, 2.5V, 1.8V, 1.2V power supply, compatible with multiple MCU voltage standards
Built-in 50Ω impedance matching resistors and capacitors for 25MHz crystal oscillator, simplified peripheral circuitry
Built-in TCP/IP stack, supports IPv4, ARP, ICMP, IGMP, UDP, TCP
CH394Q supports IPv4 and IPv6 modes, defaulting to IPv4 mode
CH394Q supports 8 sockets; CH394L supports 4 sockets, simultaneous TX/RX
MACRAW and IPRAW mode support
SPI device interface up to 62MHz (SPI mode 0 or 3), MSB first
CH394L provides high-speed 8-bit passive parallel interface for MCU parallel data bus
Network wake-up and power-down mode support
LED status indication (link, activity, 10/100M, full/half-duplex, etc.)
Built-in 32K RAM for Ethernet TX/RX; per-socket TX/RX buffer freely configurable
LQFP48 lead-free package