CH572D

CH572 is a RISC-V microcontroller with integrated 2.4G wireless communication. It features an on-chip 2Mbps low-power BLE communication module, full-speed USB controller and transceiver, voltage comparator, key detection module, and rich peripherals including SPI, UART, and I2C. The device incorporates an LDO 5V regulator to generate 3.3V, supports single 3.3V or single 5V power supply, and supports single-wire or dual-wire emulation debugging. It is suitable for 2.4G wireless communication applications and simple Bluetooth applications with a small pin count. CH570 is a low-power 2.4G wireless communication microcontroller without Bluetooth support; refer to CH572 for other modules.

Key features

• 青稞 32-bit RISC-V3C core, supporting RV32IMBC instruction set and custom extended instructions; low-power 3-stage pipeline; configurable system clock with multiple frequency options up to 100MHz; high-speed interrupt response mechanism
• 256KB non-volatile FlashROM: 240KB user application storage, 8KB system bootloader storage, and 8KB system non-volatile configuration storage; supports ICP, ISP, and IAP; supports OTA wireless upgrade
• 12KB volatile SRAM: 12KB dual-supply sleep-retention storage
• Power management and low power: integrated 5V-to-3.3V voltage regulator; supports single 5V or single 3.3V supply; idle mode current 1.7mA; suspend mode current 1.3mA (PLL/HSE active) or 420uA (PLL/HSE stopped); sleep mode current 0.46uA ~ 1.2uA (multiple levels); power-down mode current 0.3uA ~ 0.9uA (multiple levels); optional low-power battery voltage monitoring; security features: AES-128 encryption/decryption, chip ID
• 2.4G and BLE: integrated 2.4GHz RF transceiver, baseband, and link controller; supports GFSK digital modulation/demodulation; receive sensitivity -95dBm, programmable transmit power +7.5dBm; compliant with Bluetooth Low Energy 5.0 specification; supports 2Mbps and 1Mbps data rates; up to 8KHz report rate in 2.4G mode; optimized protocol stack and application-layer APIs with mesh networking support; RTC supports timer and trigger modes
• Clock: integrated PLL and low-frequency RC oscillator
• Key detection module: supports 20-channel key detection, including 10-channel matrix keys and 10-channel independent keys
• Analog voltage comparator: 16-level internal reference voltage, equivalent to 4-bit ADC
• 1x full-speed USB 2.0 controller with PHY: supports 15 endpoints, 64-byte packets, DMA support; supports full-speed/low-speed host and device modes; supports single-wire USB communication
• Timers and PWM: 1x 26-bit timer, up to 4.2s timing at 16MHz; 1-channel capture/sample supporting rising/falling/dual-edge; encoder mode with 2 channels for rotary encoder signal capture; 1x 26-bit PWM output; 5x 16-bit PWM outputs; 2 watchdog timers (independent and windowed); 32-bit system tick timer
• Async serial: 1x independent UART, 16C550-compatible, integrated 8-level FIFO; 23-bit counter, maximum baud rate up to 12.5Mbps
• SPI: supports master/slave modes; integrated FIFO with DMA support
• Two-wire serial interface: supports master/slave modes, SMBus-compatible; supports 7-bit or 10-bit addressing and bus broadcast; supports arbitration, error detection, PEC, and clock stretching
• GPIO: 12 GPIOs, 1 with 5V-tolerant input; selectable pull-up/pull-down resistors, configurable output drive strength; all 12 GPIOs support level and edge interrupt input
• Single/dual-wire emulation debug interface
• Package options: QFN, DFN, SOP