Varnitronics
CY7C68013A-56LTXC Infineon/CYPRESS
Infineon/CYPRESS

CY7C68013A-56LTXC

51 Series 8 Bit 48MHz QFN-56-EP(8x8) Application Specific Microcontrollers

QFN-56-EP(8x8)Active

High Speed USB Peripheral Controller

Manufacturer
Infineon/CYPRESS
Manufacturer part #
CY7C68013A-56LTXC
Store part #
C14912
Package / case
QFN-56-EP(8x8)
Packaging
Tray
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

1,151 in stock

#C14912

Stock & price checked 5 days ago

QuantityUnit pricePack price
1+₹1,457.52₹1,457.52
10+₹1,270.05₹12,700.50
30+₹1,087.11₹32,613.30
100+₹991.22₹99,122.00

1 × ₹1,457.52

₹1,457.52

excl. GST

₹1,719.87 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 7–10 working days
  • GST invoice with every order
  • Standard pack: 260 per tray

CY7C68013A-56LTXC

₹1,457.52 for 1 + GST

Specifications

Voltage - Supply
3V~3.6V
Operating Temperature
0℃~+70℃
Program Storage Size
16KB
CPU Core
51 Series
Core Size
8 Bit
CPU Maximum Speed
48MHz
Oscillator Type
External

Packaging & compliance

Lifecycle
Active
ECCN
3A991A3
Packaging
Tray
Standard pack
260 / Tray
Sold per
Piece
Minimum order
1
Unit weight
1.607 g

Overview

Cypress’s EZ-USB FX2LP (CY7C68013A/14A) is a low power version of the EZ-USB FX2 (CY7C68013), which is a highly integrated, low power USB 2.0 microcontroller. By integrating the USB 2.0 transceiver, serial interface engine (SIE), enhanced 8051 microcontroller, and a programmable peripheral interface in a single chip, Cypress has created a cost effective solution that provides superior time-to-market advantages with low power to enable bus powered applications. The ingenious architecture of FX2LP results in data transfer rates of over 53 Mbytes per second, the maximum allowable USB 2.0 bandwidth, while still using a low cost 8051 microcontroller in a package as small as a 56 VFBGA (5 mm×5 mm). Because it incorporates the USB 2.0 transceiver, the FX2LP is more economical, providing a smaller footprint solution than USB 2.0 SIE or external transceiver implementations. With EZ-USB FX2LP, the Cypress Smart SIE handles most of the USB 1.1 and 2.0 protocol in hardware, freeing the embedded microcontroller for application specific functions and decreasing development time to ensure USB compatibility. The General Programmable Interface (GPIF) and Master/Slave Endpoint FIFO (8-bit or 16-bit data bus) provides an easy and glueless interface to popular interfaces such as ATA, UTOPIA, EPP, PCMCIA, and most DSP/processors. The FX2LP draws less current than the FX2 (CY7C68013), has double the on-chip code/data RAM, and is fit, form and function compatible with the 56, 100, and 128 pin FX2.

Applications

  • Portable video recorder
  • MPEG/TV conversion
  • DSL modems
  • ATA interface
  • Memory card readers
  • Legacy conversion devices
  • Cameras
  • Scanners
  • Home PNA
  • Wireless LAN
  • MP3 players
  • Networking

Key features

  • USB 2.0 USB IF High Speed Certified (TID # 40460272)
  • Single Chip Integrated USB 2.0 Transceiver, Smart SIE, and Enhanced 8051 Microprocessor
  • Fit, Form, and Function Compatible with the FX2
  • Pin compatible
  • Object code compatible
  • Functionally compatible (FX2LP is a superset)
  • Ultra Low Power: lCC No More than 85 mA in any Mode
  • Ideal for bus and battery powered applications
  • Software: 8051 Code Runs from:
  • Internal RAM, which is downloaded through USB
  • Internal RAM, which is loaded from EEPROM
  • External memory device (128 pin package)
  • 16 KBytes of On-Chip Code/Data RAM
  • Four Programmable BULK, INTERRUPT, and ISOCHRONOUS Endpoints
  • Buffering options: double, triple, and quad
  • Additional Programmable (BULK/INTERRUPT) 64 Byte Endpoint
  • 8-Bit or 16-Bit External Data Interface
  • Smart Media Standard ECC Generation
  • GPIF (General Programmable Interface)
  • Enables direct connection to most parallel interfaces
  • Programmable waveform descriptors and configuration registers to define waveforms
  • Supports multiple Ready (RDY) inputs and Control (CTL) outputs
  • Integrated, Industry Standard Enhanced 8051
  • 48 MHz, 24 MHz, or 12 MHz CPU operation
  • Four clocks per instruction cycle
  • Two USARTs
  • Three counter/timers
  • Expanded interrupt system
  • Two data pointers
  • 3.3V Operation with 5V Tolerant Inputs
  • Vectored USB Interrupts and GPIF/FIFO Interrupts
  • Separate Data Buffers for the Setup and Data Portions of a CONTROL Transfer
  • Integrated I2C Controller, Runs at 100 or 400 kHz
  • Four Integrated FIFOs
  • Integrated glue logic and FIFOs lower system cost
  • Automatic conversion to and from 16-bit buses
  • Master or slave operation
  • Uses external clock or asynchronous strobes
  • Easy interface to ASIC and DSP ICs
  • Available in Commercial and Industrial Temperature Grade (all packages except VFBGA)
  • CY7C68014A: Ideal for Battery Powered Applications
  • Suspend current: 100 μA (typ)
  • CY7C68013A: Ideal for Non Battery Powered Applications
  • Suspend current: 300 μA (typ)
  • Available in Five Pb-free Packages with Up to 40 GPIOs
  • 128-pin TQFP (40 GPIOs), 100-pin TQFP (40 GPIOs), 56-pin QFN (24 GPIOs), 56-pin SSOP (24 GPIOs), and 56-pin VFBGA (24 GPIOs)
  • CY7C68016A: Ideal for Battery Powered Applications
  • Suspend current: 100 μA (typ)
  • CY7C68015A: Ideal for Non Battery Powered Applications
  • Suspend current: 300 μA (typ)
  • Available in Pb-free 56-pin QFN Package (26 GPIOs)
  • Two more GPIOs than CY7C68013A/14A enabling additional features in same footprint

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