CY8C21123-24SXIT

The PSoC family consists of many programmable system - on - chip controller devices. These devices are designed to replace multiple traditional MCU - based system components with a low cost single - chip programmable component. A PSoC device includes configurable blocks of analog and digital logic, and programmable interconnect. This architecture allows you to create customized peripheral configurations, to match the requirements of each individual application. Additionally, a fast CPU, Flash program memory, SRAM data memory, and configurable I/O are included in a range of convenient pinouts. The PSoC architecture consists of four main areas: the Core, the System Resources, the Digital System, and the Analog System. Configurable global bus resources allow the combining of all device resources into a complete custom system. Each PSoC device includes four digital blocks. Depending on the PSoC package, up to two analog comparators and up to 16 GPIO are also included. The GPIO provide access to the global digital and analog interconnects. The PSoC Core is a powerful engine that supports a rich instruction set. It encompasses SRAM for data storage, an interrupt controller, sleep and watchdog timers, and internal main oscillator (IMO), and internal low - speed oscillator (ILO). The CPU core, called the M8C, is a powerful processor with speeds up to 24 MHz. The M8C is a four MIPS 8 - bit Harvard - architecture microprocessor. System Resources provide additional capability, such as digital clocks or I²C functionality for implementing an I²C master, slave, MultiMaster, an internal voltage reference that provides an absolute value of 1.3 V to a number of PSoC subsystems, an SMP that generates normal operating voltages off a single battery cell, and various system resets supported by the M8C. The digital system consists of an array of digital PSoC blocks, which can be configured into any number of digital peripherals. The digital blocks can be connected to the GPIO through a series of global bus that can route any signal to any pin. This frees designs from the constraints of a fixed peripheral controller. The analog system consists of four analog PSoC blocks, supporting comparators and analog - to - digital conversion up to 10 bits of precision.

Key features

• Powerful Harvard - architecture processor:
• M8C processor speeds up to 24 MHz
• Low power at high speed
• Operating voltage: 2.4 V to 5.25 V
• Operating voltages down to 1.0 V using on - chip switch mode pump (SMP)
• Industrial temperature range: - 40 ℃ to + 85 ℃
• Advanced peripherals (PSoC blocks):
• Four analog type “E” PSoC blocks provide:
• Two comparators with digital to analog converter (DAC) references
• Single or dual 10 - Bit 8 - to - 1 analog to digital converter (ADC)
• Four digital PSoC blocks provide:
• 8 - to 32 - bit timers and counters, 8 - and 16 - bit pulse - width modulators (PWMs)
• CRC and PRS modules
• Full duplex UART, SPI master or slave: Connectable to all general - purpose I/O (GPIO) pins
• Complex peripherals by combining blocks
• Flexible on - chip memory:
• 4 KB flash program storage 50,000 erase/write cycles
• 256 bytes SRAM data storage
• In - system serial programming (ISSP)
• Partial flash updates
• Flexible protection modes
• EEPROM emulation in flash
• Complete development tools:
• Free development software (PSoC Designer)
• Full - featured, in - circuit emulator (ICE) and programmer
• Full - speed emulation
• Complex breakpoint structure
• 128 - KB trace memory
• Precision, programmable clocking:
• Internal ±5% 24 - / 48 - MHz main oscillator
• Internal low - speed, low - power oscillator for watchdog and sleep functionality
• Programmable pin configurations:
• 25 - mA sink, 10 - mA source on all GPIOs
• Pull - up, pull - down, high Z, strong, or open - drain drive modes on all GPIOs
• Up to eight analog inputs on all GPIOs
• Configurable interrupt on all GPIOs
• Additional system resources:
• I²C master, slave and multi - master to 400 kHz
• Watchdog and sleep timers
• User - configurable low - voltage detection (LVD)
• Integrated supervisory circuit
• On - chip precision voltage reference