DSPIC33AK128MC106-E/M7

Key features

• Operating conditions: 3.0V to 3.6V supply, -40°C to +85°C ambient temperature, DC to 200 MHz operation
• Operating conditions: 3.0V to 3.6V supply, -40°C to +125°C ambient temperature, DC to 200 MHz operation
• Operating conditions: 3.0V to 3.6V supply, -40°C to +150°C ambient temperature, DC to 200 MHz operation
• High-performance dsPIC33A DSP CPU
• 32-bit unified instruction set optimized for speed and code size: compatible with 16-bit dsPIC33 core; non-paged linear data/flash 24-bit address space; 16-bit/32-bit instructions optimized for code size and performance
• 32-bit wide data path
• Single- and double-precision floating-point unit coprocessor
• 2 KB instruction cache
• Sixteen 32-bit working registers
• Dual 72-bit accumulators supporting 32-bit and 16-bit fixed-point DSP operations
• Eight-level deep working register context
• Eight-level deep accumulator register context
• Eight-level deep floating-point register context
• Memory features: up to 128 KB program flash: 10,000 erase/write cycle endurance; minimum 20-year data retention; self-programmable under software control; programmable code protection; flash ECC; programmable OTP area; whole-flash OTP via ICSP write inhibit; 64 x 128-bit OTP area
• Up to 16 KB RAM: RAM ECC; RAM memory BIST
• 6-channel hardware DMA module
• Controller features: high-current sink/source I/O; programmable weak pull-up and pull-down resistors; programmable open-drain output; edge or level-change notification interrupts on I/O pins; peripheral pin select (PPS) for pin function remapping; multiple interrupt vectors with independently programmable priorities; five external interrupt pins
• Oscillator options including: 8 MHz internal fast RC oscillator with 1% accuracy over 0°C–85°C; 8 MHz internal backup fast RC oscillator with 2% accuracy and 32 kHz divided output; high-speed crystal resonator oscillator or external clock
• Two 1.6 GHz PLLs for peripherals, clocked from fast RC or crystal oscillator
• Reference clock output
• Low-power modes
• Power-on reset and brown-out reset
• High-resolution PWM: four PWM generators; up to 2.5 ns PWM resolution; leading- and trailing-edge dead time; dead-time compensation for lower-speed operation; PWM support for: brushless DC, PMSM, AC induction, switched reluctance, and stepper motors; fault and current-limit inputs; flexible trigger configuration for ADC triggering
• Two high-speed ADCs: 12-bit resolution; up to 40 Msps conversion rate; up to 22 analog input pins; 20 dedicated channels, each: independently configurable; assignable to any analog input; settable to different sample times; configurable as single-ended or differential; conversion results formattable as unsigned or signed; conversion results left-alignable; dedicated 32-bit conversion result register
• Four sampling modes supported: oversampling of multiple samples; integration of multiple samples; windowed sampling; single conversion; all channels feature digital comparators for configurable threshold detection; three channels support a second result accumulator for second-order filtering
• Band gap reference and temperature sensor diode input
• Additional analog features: three 5 ns analog comparators with 12-bit PWM DAC: input multiplexing; slope compensation; one DAC output buffer
• Three rail-to-rail 100 MHz op-amps: 100 V/µs slew rate; 1 mV offset; user-calibratable input offset voltage
• Four 10 µA constant current sources + four programmable sources
• Peripheral features: three 4-wire SPI modules: 4-byte FIFO; variable data width; I2S mode
• Two I2C modules: independent master and client logic; 100 kHz, 400 kHz, and 1 MHz bus specification support; 7-bit and 10-bit device addressing; IPMI, SMBus, and PMBus support
• Three protocol UARTs with 8-character RX/TX FIFO
• Auto-UART handling support for: LIN 2.2, DMX 512, smart card, IrDA
• Two single-edge nibble transmission (SENT) modules
• One dedicated 32-bit timer/counter
• Four single-output capture/compare/PWM/timer modules: flexibly configurable as PWM, input capture, output compare, or timer; each module contains two 16-bit timers or one 32-bit timer; single PWM output pin
• One quadrature encoder interface: four inputs: Phase A, Phase B, home, index
• Four configurable logic cells (CLCs), internally connected to selectable peripherals and PPS
• Bidirectional serial synchronous encoder interface supporting up to four client encoders
• Peripheral trigger generator: 10 input trigger sources from other peripheral modules; 5 output triggers to other peripheral modules; 4 independent IRQ signals; CPU-independent state machine-based instruction sequencer
• Security modules: secure boot; secure debug; immutable root of trust; code protection; ICSP program/erase disable; firmware IP protection; flash write protection
• Safety features: windowed watchdog timer; deadman timer; four I/O integrity monitors; fail-safe clock monitor with automatic switchover to backup clock source; flash ECC; RAM ECC; RAM memory BIST; 32-bit CRC module; whole-flash OTP via ICSP write inhibit; capacitor-less internal voltage regulator; virtual PPS pins for redundancy and monitoring; temperature sensor diode
• Functional Safety Ready – compliant with ISO 26262/IEC 61508/IEC 60730