F1C200S

The F1C200s processor represents Allwinner’s latest achievement in mobile applications processors. The processor targets the needs of video boombox markets. The F1C200s is based on the ARM9 CPU architecture with a high degree of functional integration, and supports Full HD video playback, including H.264, H.263, MPEG1/2/4 decoder. Integrated audio codec and I2S/PCM interface provide end users with a good audio experience. TV-IN interface enables video input by connecting to video devices such as camera, and TV-OUT interface enables video output by connecting to TV devices. To reduce the BOM costs, the F1C200s built-in DDR1 memory, and it is packed with general-purpose peripherals such as USB OTG, UART, SPI, TWI, TP, SD/MMC, CSI, etc. The F1C200s outperforms competitors in terms of its powerful performance, low power consumption, and flexible scalability.

Applications

• Video Playback
• Audio Playback FM

Key features

• Five-stage pipeline architecture
• Support 16KByte D-Cache
• Support 32KByte I-Cache
• Boot ROM: Internal memory, On-Chip ROM boot loader Support system boot from SPI Nor/Nand Flash, and SD/TF card, Support system code download through USB OTG
• SDRAM: SIP DDR1
• SD/MMC Interface: External memory, Support secure digital memory protocol commands (up to SD2.0), Support secure digital I/O protocol commands (up to SDIO2.0), Support multimedia card protocol commands (up to eMMC4.41), Support one SD (Verson1.0 to 2.0) or MMC (version 3.3 to eMMC4.41), Support hardware CRC generation and error detection, Support host pull-up control, Support SDIO interrupts in 1-bit and 4-bit modes, Support SDIO suspend and resume operation, Support SDIO read wait, Support block size of 1 to 65535 bytes, Support descriptor-based internal DMA controller, Internal 128 bytes FIFO for data transfer, Support 3.3V IO pad
• Timer: Three timers, Support watchdog reset, Support audio and video synchronize counter
• INTC: Support up to 64 interrupts, Support 4-level priority, Support interrupt mask, Support interrupt fast forcing, Support one external interrupt
• CCU: Support 6 PLLs, Control of clock generation, division, distribution and gating, Control of device software reset
• DMA: Support Normal DMA and Dedicated DMA, Support two kinds of interrupt, Support hardware continuous transfer mode
• PWM: Support two PWM outputs, Support cycle mode and pulse mode, Support 24MHz maximum output frequency
• Display Engine: Support Alpha blending / color key, Support multi-format input formats 1/2/4/8/16/32 bpp color YUV444/YUV422/YUV420/YUV411, Support hardware cursor, Support scaling function for one layer ARGB8888/YUV444/YUV420/YUV422/YUV411, Input and output size up to 1280x720 pixels, Resize ratio from 1/16X to 32X, 4-tap 32-phase anti-aliasing filter in horizontal and vertical direction, Scaler supports write-back to memory function
• Display Output: LCD RGB interface, TTL interface, up to 1280x720@60fps, LCD Serial RGB interface, CCIR656 interface, up to 720x576@60fps, LCD i8080 interface with 18/16/9/8 bit, up to 800x480@60fps, LCD Dither function, support RGB666/RGB565 interface, TV CVBS output, support NTSC/PAL, with auto plug detecting
• Video Engine: Support H.264 BP/MP/HP up to 1920x1080@30fps decoding, Support MPEG1 and MPEG2 up to 1920x1080@30fps decoding, Support MPEG4 SP/ASP GMC and H.263 including Sorenson Spark up to 1920x1080@30fps decoding, Support MJPEG encode up to 1280x720@30fps, Support JPEG encode size