FE2.1-CQFP48AT

The FE2.1 is a highly integrated, high quality, high performance, low power consumption, yet low cost solution for USB 2.0 High Speed 7-Port Hub. It adopts Multiple Transaction Translator (MTT) architecture to explore the maximum possible throughput. Six, instead of two, non-periodic transaction buffers are used to minimize potential traffic jamming. The whole design is based on statemachine-control to reduce the response delay time; no micro controller is used in this chip.

Key features

• To guarantee high quality, the whole chip is covered by Test Scan Chain – include even on the high speed (480MHz) modules, so that all the logic components could be fully tested before shipping.
• Special BuildIn-Self-Test mode is designed to exercise all high, full, and low speed Analog Front End (AFE) components in the packaging and testing stages as well.
• Low power consumption is achieved by using 0.18μm technology and comprehensive power/clock control mechanism. Most part of the chip will not be clocked unless needed.
• Low power consumption: 155 mA when seven downstream facing ports enabled in High-Speed mode; 66 mA when one downstream facing port enabled in High-Speed mode.
• Fully compliant with Universal Serial Bus Specification Revision 2.0 (USB 2.0).
• Upstream facing port supports High-Speed (480MHz) and FullSpeed (12MHz) modes.
• 7 downstream facing ports support High-Speed (480MHz), Full-Speed (12MHz), and Low-Speed (1.5MHz) modes.
• Integrated USB 2.0 Transceivers.
• Integrated upstream 1.5KΩ pull-up, downstream 15KΩ pull-down, and serial resistors.
• Integrated 5V to 3.3V and 1.8V regulator.
• Integrated Power-On-Reset circuit.
• Integrated 12MHz Oscillator with feedback resistor and crystal load capacitor.
• Integrated 12MHz-to-480MHz Phase Lock Loop (PLL).
• Multiple Transaction Translators (MTT): One TT for each downstream port.
• Alternate Interface 0 for Single-TT, and Alternate Interface 1 for Multiple-TT.
• Each TT could handle 64 periodic StartSplit transactions, 32 periodic Complete-Split transactions, and 6 none-periodic transactions.
• Support self-power Mode only.
• Board configured options: Ganged or Individual Power Control Mode select; Global, Multiple Gangs, or Individual Over-Current Protection Mode select; Removable or Non-Removable Downstream Devices configuration; Number of Downstream Ports.
• EEPROM configured options: Vendor ID, Product ID, & Device Release Number; Removable or Non-Removable Downstream Devices configuration; Serial Number; and Number of Downstream Ports.
• Comprehensive status Indicators support: Standard downstream port status indicators (Green and Amber LED control for each downstream port); Hub Active/Suspend indicator LED.