FT61F0A5-TRB

Key features

• Expanded to 49 instructions
• Instruction cycle options: 1T / 2T / 4T
• 8MHz, VDD ≥ 1.9V; 16MHz, VDD ≥ 2.7V
• Program ROM: 10k×14 bits
• Data RAM: 1×8 bits
• Data EEPROM: 128×8 bits
• Sector-based program code protection (sector = 1k×14 bits)
• IAP supported, VDD ≥ 2.7V
• 16-level hardware stack
• Operating temperature range: -40 - 85°C
• Wide operating voltage range: 1.9 - 5.5V
• Two internal clocks: 16M high-speed high-accuracy HIRC, 32k low-speed low-power LIRC
• Crystal oscillator and external clock input
• Crystal clock missing detection
• Dual-speed clock startup under crystal clock configuration
• Slow clock period measurement
• 16-bit watchdog with 7-bit prescaler, selectable clock source
• Power-on reset delay counter
• Low-power SLEEP mode: system clock selectable to remain active or shut down
• LVR: 2.0, 2.2, 2.5, 2.8, 3.1, 3.6, 4.1V
• LVD: internal voltage: 2.0, 2.4, 2.8, 3.0, 3.6, 4.0V; or external input detection, usable as comparator
• ISP and on-chip debug OCD supported, 3 hardware breakpoints
• Software reset, single-step, halt, step-over, etc.
• Package options: SOP8, MSOP10, SOP16, SOP20, TSSOP20, QFN20
• 18 pins with independent direction control
• 18 pins with independent pull-up control
• 18 pins with independent pull-down control
• 18 wake-up pins: edge or level detection
• ADC input channels: AN0~AN6, OP amp output
• External reset pin: PC0
• PORTA programmable source current: 4/29mA@5V
• PORTB programmable source current: 8/29mA@5V
• PORTC programmable source current: 4/8/29mA@5V
• 18 programmable sink currents: max. 61mA@5V
• Pin alternate function remapping supported
• 2 x UART
• 1 x I2C, master/slave
• 1 x SPI, master/slave, RZ modulation supported
• 1 x 12-bit SAR ADC, 6 external channels + 1 x 1/4VDD channel + OP1OUT
• Internal reference voltage: VDD, 0.5V, 2V, 3V
• External reference: VREFP, VREFN
• Manual and auto trigger modes, delayed trigger supported
• 1 x integrated op-amp with offset calibration support
• TIM1 - 16-bit: 16-bit timer with 16-bit prescaler, auto-reload, clock sources: system clock, HIRC and multiplied clock (2× crystal or HIRC), LIRC; double-buffered period and duty cycle registers; 4 independent capture/compare/PWM channels; edge-aligned, center-aligned, and one-pulse modes supported; 3 pairs of complementary PWM outputs with dead-time control; leading-edge blanking and fault brake control
• TIM2 - 16-bit: 16-bit timer with 15-bit prescaler, auto-reload, clock sources: system clock, HIRC and multiplied clock (2× crystal or HIRC), LIRC; double-buffered period and duty cycle registers; 3 independent capture/compare/PWM channels
• TIM4 - 8-bit: basic timer with 8-bit prescaler, selectable clock source