HK32F030MF4P6

The HK32F030M series is based on the ARM Cortex™-M0 core, operating at up to 32MHz, with 16K-Byte FLASH, 448-Byte EEPROM, and 2K-Byte SRAM. Through register configuration of the FLASH controller, interrupt vector remapping within the 16K-Byte address space is supported. All pins of the HK32F030M, except power and ground, can function as GPIO, peripheral I/O, or external interrupt inputs (TSSOP20 package supports 16 GPIOs), maximizing the number of available pin signals in pin-constrained applications. The HK32F030M integrates multiple communication interfaces: 1× high-speed USART (up to 6Mbps), 1× high-speed SPI/I2S (up to 18Mbps), and 1× high-speed I2C (up to 1MHz). USART supports synchronous and asynchronous full-duplex or half-duplex communication, multi-master communication, LIN protocol, SmartCard protocol, and IrDA SIR encoding/decoding; RX/TX pin positions are software-swappable, with data reception wake-up supported in MCU Stop mode. SPI/I2S supports full-duplex or half-duplex communication with 4~16-bit data length, master/slave mode, TI mode, NSS pulse mode, automatic CRC verification, and I2S protocol. I2C supports 1MHz/400kHz/100kHz transfer rates, master/slave mode, multi-master mode, 7/10-bit addressing, and SMBus protocol, with data reception wake-up supported in MCU Stop mode. The HK32F030M integrates 1× 16-bit advanced PWM timer (4 PWM output channels, 3 of which feature dead-time complementary output), 1× 16-bit general-purpose PWM timer (4 PWM output channels), and 1× 16-bit basic timer (timed CPU interrupt output). The HK32F030M incorporates analog circuitry: 1× 12-bit 1Msps ADC (8-bit effective resolution), 1× POR/PDR power-on/power-down reset circuit, and 1× internal reference voltage (sampled on-chip by the ADC). The HK32F030M supports a wide range of low-power modes and can be automatically woken up by the internal low-power timer in low-power mode. The HK32F030M operates over a temperature range of -40℃ to +85℃ with a supply voltage of 1.8V to 3.6V, meeting the requirements of most application environments.

Applications

• Programmable controllers, printers, scanners
• Motor drive and speed control
• IoT low-power sensor terminals
• Toy products
• Home appliances
• Intelligent robots
• Smartwatches, fitness bands

Key features

• Operating voltage range: 1.8V~3.6V
• Operating temperature range: -40℃~+85℃
• Typical operating current:
• Run mode: 2.3mA@32MHz@3.3V (71uA/MHz)
• Sleep mode: 1.2mA@32MHz@3.3V (37uA/MHz), wake-up time 21nS
• D-Sleep deep sleep mode: 0.61mA@114kHz@3.3V, wake-up time 7.8us
• Stop mode: 30uA@3.3V, wake-up time 10uS (wake-up via external pin or internal timer)
• CPU core:
• ARM Cortex™-M0
• Maximum clock frequency: 32MHz
• 24-bit System Tick timer
• Interrupt vector remapping support (configured via FLASH controller registers)
• CPU trace and debug:
• SWD debug interface
• ARM CoreSight™ debug components (ROM-Table, DWT, BPU)
• Custom DBGMCU debug controller (low-power mode emulation control, debug peripheral clock control, debug and trace interface assignment)
• Memory:
• 16K-Byte FLASH (128 pages, 128-Byte per page; 32-bit data read, 8-bit data write)
• FLASH with data security protection, supporting independent read protection and write protection settings
• 448-Byte EEPROM (Byte program time 20uS)
• 2K-Byte SRAM
• Data security: CRC hardware unit
• Clock:
• External high-speed clock: 1~32MHz support (selectable from 4 pins, 1 input)
• On-chip high-speed HSI clock: 32MHz
• On-chip low-speed LSI clock: 114kHz
• Reset:
• External pin reset
• Power-on and power-down reset (POR and PDR)
• Software reset
• Watchdog (IWDG and WWDG) timer reset
• GPIO ports:
• Up to 16 GPIO ports (TSSOP20 package)
• Each GPIO configurable as external interrupt input
• Built-in switchable pull-up/pull-down resistors
• Open-Drain output support
• Two selectable output drive strength levels (high and low)
• IOMUX pin function remapping controller: for small packages (e.g., SO8N/SOP8), IOMUX enables single-pin mapping to multiple GPIOs or peripheral IOs
• Data communication interfaces:
• 1× high-speed USART (up to 4Mbps), supports data reception wake-up in Stop mode
• 1× high-speed I2C (up to 1MHz), supports data reception wake-up in Stop mode
• 1× high-speed SPI (up to 16Mbps), supports I2S protocol
• Timers and PWM generators:
• 1× 16-bit advanced PWM timer (4 PWM outputs, 3 with complementary dead-band outputs)
• 1× 16-bit general-purpose PWM timer (4 PWM outputs)
• 1× 16-bit basic timer (CPU interrupt support)
• 1× auto-wakeup timer AWU, operational in Stop mode
• Beeper:
• 1× Beeper, outputting 1, 2, 4, 8kHz frequency pulses
• In Stop mode, Beeper remains operational and can trigger ADC sampling periodically
• On-chip analog circuitry:
• 64-bit unique chip ID
• Reliability verified through HBM4000V/CDM500V/MM200V/LU level testing