HK32F04ACBT6A

The HK32F04AxxxxA is based on the ARM Cortex-M0 core, operating at up to 96 MHz, with up to 124 Kbyte of on-chip Flash and 10 Kbyte of SRAM. Interrupt vector remapping within the main Flash region can be achieved by configuring the Flash controller registers. The HK32F04AxxxxA supports conventional Flash Level 0/1/2 read/write protection and Flash code encryption (Himax proprietary patent). To meet various security application requirements, the HK32F04AxxxxA provides CRC, AES, HASH, and TRNG hardware computation units for verifying the correctness and integrity of data transmission or data storage, as well as for encrypting and decrypting Flash data. The HK32F04AxxxxA integrates multiple communication interfaces: Up to 3 UART channels (up to 12 Mbit/s): including 2 USART channels and 1 LPUART channel. USART supports synchronous and asynchronous full-duplex or half-duplex communication, multi-master communication, LIN protocol, SmartCard protocol, and IrDA SIR encoding/decoding; RX and TX pin assignments can be swapped in software; data reception wake-up is supported in MCU Stop mode. Up to 2 high-speed (up to 18 Mbit/s) SPI/I2S channels. SPI/I2S supports full-duplex or half-duplex communication with 4–16-bit data width, master/slave mode, TI mode, NSS pulse mode, automatic CRC checking, and I2S protocol. Up to 2 high-speed (up to 1 MHz) I2C channels. I2C supports 1 MHz/400 kHz/100 kHz transfer modes, master/slave mode, multi-master mode, 7-bit/10-bit address, and SMBus protocol. Data reception wake-up is supported in MCU Stop mode. The HK32F04AxxxxA integrates 1 × 16-bit advanced PWM timer (4 PWM output channels, 3 of which feature dead-time complementary output), 5 × 16-bit and 1 × 32-bit general-purpose PWM timers, and 1 basic timer. The HK32F04AxxxxA integrates analog circuitry: 1 × 12-bit ADC (16 analog input channels, differential pair input supported; sampling rate up to 1 MSPS), 1 × POR/PDR circuit, 1 internal reference voltage (sampled via the on-chip ADC), and 1 × 1/2 V_BAT voltage divider circuit. The HK32F04AxxxxA integrates a hardware division and square-root unit (DVSQ) to enhance software processing capability and enable faster response to external events. The HK32F04AxxxxA also implements motor algorithms in hardware, enabling faster processing of motor drive operations. The HK32F04AxxxxA provides 4 programmable logic units for user-programmable asynchronous and synchronous Boolean logic operations. All pins of the HK32F04AxxxxA, except power, ground, NRST, and BOOT, can be used as GPIO, peripheral I/O, or external interrupt inputs, maximizing the number of available signal pins in pin-constrained applications. The HK32F04AxxxxA operates over a temperature range of -40℃ to +105℃ with a supply voltage of 1.8–3.6 V, meeting the requirements of the vast majority of application environments.

Applications

• Programmable controllers
• Printers
• Scanners
• Motor drive and speed control
• IoT terminals such as water meters, electricity meters, and gas meters
• Drone flight controllers and gimbal control
• Toy products
• Home appliances
• Intelligent robots
• Smartwatches and fitness bands
• ETC

Key features

• CPU core: ARM Cortex-M0
• Maximum clock frequency: 96 MHz
• 24-bit System Tick timer
• Interrupt vector remapping support (via Flash controller register configuration)
• Operating voltage range: Single power domain (main supply V_DD): 1.8 - 3.6 V; Backup supply (V_BAT): 1.8 V - 3.6 V
• Operating temperature range: -40℃ to +105℃
• Typical operating current: Run mode: 6.1 mA@96 MHz; 1.6 mA@8 MHz; Sleep mode: 4.7 mA@96 MHz; Stop mode: LDO full speed: 0.7 mA@3.3 V; LDO low power: 60 μA@3.3 V; Standby mode: 1.6 μA@3.3 V; Shutdown mode: 0.4 μA@3.3 V
• Memory: 124 Kbyte Flash with zero-wait-state bus cycle access when CPU frequency ≤ 24 MHz. Flash features data security protection with independently configurable read and write protection. Supports encryption of instructions and data stored in Flash to prevent physical attacks. 10 Kbyte SRAM
• Data security: CRC hardware unit; multiple security encryption modules including AES, HASH, and TRNG
• Clocks: External high-speed clock (HSE): 4 - 32 MHz, typical 8 MHz; External low-speed clock (LSE): 32.768 kHz; Internal high-speed clock (HSI): configurable at 8 MHz / 14 MHz / 56 MHz; Internal low-speed clock (LSI): 40 kHz; PLL clock: maximum output frequency 96 MHz; External pin input clock (EXTCLK)
• Reset: External pin reset, power-on reset (POR/PDR), software reset, watchdog (IWDG and WWDG) reset, low-power management reset, option byte loader reset, programmable voltage detector (PVD)
• 8-level detection voltage threshold, configurable rising/falling edge detection
• GPIO: Up to 55 GPIO pins, each configurable as external interrupt input
• Communication interfaces: 2× USART: master synchronous SPI and hardware flow control for modem, with ISO7816, LIN, IrDA, auto baud rate detection, and wake-up from Stop mode. Up to 2× high-speed SPI: 4- to 16-bit programmable data frame with multiplexed I2S interface. Up to 2× I2C: ultra-fast mode (1 MHz), SMBus, and PMBus support; data reception wake-up in Stop mode. 1× LPUART: asynchronous serial communication at minimum power, single-wire half-duplex, hardware flow control (CTS/RTS), and multi-processor communication. 1× CAN: CAN protocol support (2.0A and 2.0B active mode)
• Timers and PWM generators: 1× 16-bit advanced timer (4-channel PWM output, 3 channels with dead-time complementary output and brake function); 5× 16-bit and 1× 32-bit general-purpose timers (TIM2/TIM3/TIM14/TIM15/TIM16/TIM17); 1× 16-bit basic timer (TIM6)