MCF52235CAL60

The MCF52235 is a member of the ColdFire family of reduced instruction set computing (RISC) microcontrollers. This 32-bit device is based on the Version 2 ColdFire core operating at a frequency up to 60 MHz, offering high performance and low power consumption. On-chip memories connected tightly to the processor core include up to 256 Kbytes of Flash and 32 Kbytes of static random access memory (SRAM). On-chip modules include: - V2 ColdFire core providing 56 Dhrystone 2.1 MIPS @ 60 MHz executing out of on-chip Flash memory using enhanced multiply accumulate (EMAC) and hardware divider Enhanced Multiply Accumulate Unit (EMAC) and hardware divide module - Cryptographic Acceleration Unit (CAU) coprocessor - Fast Ethernet Controller (FEC) - On-chip Ethernet Transceiver (EPHY) - FlexCAN controller area network (CAN) module - Three universal asynchronous/synchronous receiver/transmitters (UARTs) - Inter-integrated circuit (I²C) bus controller Queued serial peripheral interface (QSPI) module Eight-channel 10- or 12-bit fast analog-to-digital converter (ADC) - Four channel direct memory access (DMA) controller - Four 32-bit input capture/output compare timers with DMA support (DTIM) - Four-channel general-purpose timer (GPT) capable of input capture/output compare, pulse width modulation (PWM) and pulse accumulation Eight/Four-channel 8/16-bit pulse width modulation timers (two adjacent 8-bit PWMs can be concatenated to form a single 16-bit timer) - Two 16-bit periodic interrupt timers (PITs) - Real-time clock (RTC) module Programmable software watchdog timer - Two interrupt controllers providing every peripheral with a unique selectable-priority interrupt vector plus seven external interrupts with fixed levels/priorities Clock module with support for crystal or external oscillator and integrated phase-locked loop (PLL) - Test access/debug port (JTAG, BDM)