MSP430AFE253IPWR

The MSP430 series of ultra-low-power microcontrollers includes several devices, each featuring a distinct set of peripherals tailored for various applications. This architecture, combined with five low-power modes, is optimized to extend battery life in portable measurement applications. The device is equipped with a powerful 16-bit RISC CPU, 16-bit registers, and a constant generator that aids in achieving maximum coding efficiency. The Digital Control Oscillator (DCO) can wake up the device from a low-power mode to the operating mode in less than 1µs. The MSP430AFE2x3 device is an ultra-low-power mixed-signal microcontroller that integrates three independent 24-bit delta-sigma A/D converters, a 16-bit timer, a 16-bit hardware multiplier, a USART communication interface, a watchdog timer, and 11 I/O pins. The MSP430AFE2x2 device is identical to the MSP430AFE2x3, except that it only integrates two 24-bit delta-sigma A/D converters. The MSP430AFE2x1 device is also identical to the MSP430AFE2x3, except that it only integrates one 24-bit delta-sigma A/D converter. The MSP430 CPU features a 16-bit RISC architecture that is highly transparent to applications. All operations (excluding program flow instructions) are executed as register operations, along with seven addressing modes for source operands and four addressing modes for destination operands. The CPU is integrated with 16 registers, which provide streamlined instruction execution times. Register-to-register operations are executed in one CPU clock cycle. Four of these registers (R0 to R3) are dedicated as the program counter, stack pointer, status register, and constant generator, respectively. The remaining registers are general-purpose registers. Peripherals are connected to the CPU via data, address, and control buses and can be controlled using all instructions. The instruction set includes 51 instructions with three formats and seven address modes. Each instruction can operate on both word and byte data. The MSP430 microcontroller has one active mode and five software-selectable low-power operating modes. An interrupt event can wake the device from any of the five low-power modes, handle the request, and resume the low-power mode upon receiving a return signal from the interrupt program. The flash memory can be programmed via the Spy - Bi - Wire/JTAG port or programmed in-system by the CPU. The CPU can perform single-byte and single-word write operations to the flash memory. The clock system is supported by a basic clock module, which includes an internal digitally controlled oscillator (DCO), a high-frequency crystal oscillator, and an internal ultra-low-power low-frequency oscillator (VLO). The basic clock module is designed to meet both low system cost and low-power requirements. The internal DCO provides a fast-turn-on clock source and can stabilize in less than 1µs. The basic clock module provides the following clock signals: Auxiliary Clock (ACLK), sourced by the VLO; Main Clock (MCLK), the system clock used by the CPU; and Sub-System Master Clock (SMCLK), the subsystem clock used by peripheral modules. An undervoltage circuit is established to provide the correct internal reset signal to the device during power-up and power-down. The Supply Voltage Supervisor (SVS) circuit detects if the supply voltage drops below a user-selectable level and supports supply voltage monitoring (automatic device reset) and supply voltage supervision (SVM) (no automatic device reset). Two I/O ports are implemented: an 8-bit port P1 and a 3-bit port P2. All individual I/O bits can be programmed independently. Input, output, and interrupt conditions can be combined in any way. Edge-selectable interrupt input functions are available for all 8 bits of port P1 and port P2. All instructions support read/write access to the port control registers. Each I/O has a separately programmable pull-up/pull-down resistor. The primary function of the Watchdog Timer (WDT+) module is to perform a controlled system restart after a software issue occurs. A system reset is generated if the selected time interval elapses. If the watchdog function is not required in an application, the module can be disabled or configured as an interval timer and can generate an interrupt at the selected time interval. Timer_A3 is a 16-bit timer/counter with three capture/compare registers. Timer_A3 can support multiple capture/compare registers, PWM output, and interval timing. Timer_A3 also has extensive interrupt capabilities. The counter can generate an interrupt on overflow, and each capture/compare register can also generate an interrupt.

Key features

• Low supply voltage range: 1.8V to 3.6V
• Ultra-low power consumption
• Active mode: 220μA (at 1MHz, 2.2V)
• Standby mode: 0.5μA
• Off mode (RAM retention): 0.1μA
• 5 power-saving modes
• Ultra-fast wake-up from standby in less than 1μs
• 16-bit RISC architecture, up to 12MHz system clock
• Basic clock module configured with internal frequency up to 12MHz with two calibrated frequencies
• Internal ultra-low-power LF oscillator
• HF crystal resonator up to 16MHz
• External digital clock source
• Up to 3 24-bit sigma-delta ADCs with differential PGA inputs
• 16-bit Timer_A with 3 capture/compare registers
• USART, software-selectable asynchronous UART or synchronous SPI
• 16-bit hardware multiplier
• Brownout detector
• Supply voltage supervisor/monitor with programmable level detection
• Serial on-board programming, no external programming voltage required, programmable code protection via security fuse
• On-chip emulation module