N32G430F8S7

The N32G430 series features a 32-bit ARM Cortex-M4 core with a maximum operating frequency of 128MHz, supporting floating-point operations and DSP instructions. It integrates up to 64KB embedded encrypted Flash, 16KB SRAM, and a rich set of high-performance analog components, including a built-in 12-bit 4.7Msps ADC, 3 high-speed comparators, and multiple digital communication interfaces such as U(S)ART, I2C, SPI, and CAN.

Key features

• 32-bit ARM Cortex-M4 core + FPU, DSP instruction support
• Built-in 1KB instruction cache, Flash accelerator unit for zero-wait program execution
• Up to 128MHz clock frequency, 160DMIPS
• Up to 64KByte on-chip Flash with encrypted storage, partition management, and data protection; 10,000 erase/write cycles, 10-year data retention
• Up to 16KByte on-chip SRAM, retained in Stop2 mode, configurable retention in Standby mode
• Run, Sleep, Stop0, Stop2, and Standby mode support
• 1× 12-bit 4.7Msps ADC, configurable as 12/10/8/6-bit, up to 16 external single-ended input channels, 3 internal single-ended input channels, differential mode support
• 3 high-speed comparators with built-in 64-level adjustable reference voltage
• HSE: 4MHz~32MHz external high-speed crystal
• LSE: 32.768KHz external low-speed crystal
• HSI: Internal high-speed RC 8MHz
• LSI: Internal low-speed RC 40KHz
• Built-in high-speed PLL
• MCO: 2-channel clock output, configurable as SYSCLK, HSI, HSE, LSI, LSE, or divided PLL clock output
• Power-on/power-down/external pin reset support
• Watchdog reset and software reset support
• Programmable voltage detection support
• Up to 39+1 GPIOs
• 4× U(S)ART interfaces: 2× USART with ISO7816, IrDA, and LIN support; 2× UART
• 2× SPI interfaces, master mode up to 28Mbps (without CRC) or 20Mbps (with CRC), slave mode up to 32Mbps, I2S communication support
• 2× I2C interfaces, up to 1MHz, configurable master/slave mode, dual-address response in slave mode
• 1× CAN 2.0A/B bus interface, up to 1Mbps
• 1× high-speed DMA controller, 8-channel support, arbitrary configurable source and destination addresses
• 1× RTC with leap year perpetual calendar, alarm event, periodic wake-up, internal/external clock calibration support
• 1× Beeper with complementary output, 12mA output drive capability
• 2× 16-bit advanced timers with input capture, complementary output, quadrature encoder input, up to 7.8ns control resolution; Timer1 supports 4-channel 8-output complementary PWM; Timer8 supports 3-channel 6-output complementary PWM
• 4× 16-bit general-purpose timers, each with 4 independent channels, input capture/output compare/PWM output support
• 1× 16-bit basic timer
• 1× 16-bit low-power timer with single-pulse and dual-pulse counting, operational in Stop2 mode
• 1× 24-bit SysTick timer
• 1× 14-bit window watchdog
• 1× 12-bit independent watchdog
• SWD/JTAG debug interface support
• UART Bootloader support
• Flash storage encryption, multi-user partition management
• CRC16/32 computation
• Write protection and multiple read protection levels
• Secure boot, encrypted program download, and secure update support
• External clock failure detection and tamper detection support
• 96-bit UID and 128-bit UCID