PIC24F08KA101-I/MQ

Key features

• Run – CPU, Flash, SRAM and Peripherals On
• Doze – CPU Clock Runs Slower than Peripherals
• Idle – CPU Off, Flash, SRAM and Peripherals On
• Sleep – CPU, Flash and Peripherals Off and SRAM On
• Deep Sleep – CPU, Flash, SRAM and Most Peripherals Off
• Run mode currents down to 8 μA typical
• Idle mode currents down to 2 μA typical
• Deep Sleep mode currents down to 20 nA typical
• RTCC 490 nA, 32 kHz, 1.8V
• Watchdog Timer 350 nA, 1.8V typical
• Modified Harvard Architecture
• Up to 16 MIPS Operation @ 32 MHz
• 8 MHz Internal Oscillator with 4x PLL Option and Multiple Divide Options
• 17-Bit by 17-Bit Single-Cycle Hardware Multiplier
• 32-Bit by 16-Bit Hardware Divider
• 16-Bit x 16-Bit Working Register Array
• C Compiler Optimized Instruction Set Architecture
• Hardware Real-Time Clock and Calendar (RTCC): Provides clock, calendar and alarm functions; Can run in Deep Sleep Mode
• Programmable Cyclic Redundancy Check (CRC)
• Serial Communication modules: SPI, I²C and two UART modules
• Three 16-Bit Timers/Counters with Programmable Prescaler
• 16-Bit Capture Inputs
• 16-Bit Compare/PWM Output
• Configurable Open-Drain Outputs on Digital I/O Pins
• Up to Three External Interrupt Sources
• 10-Bit, up to 9-Channel Analog-to-Digital Converter: 500 ksps conversion rate; Conversion available during Sleep and Idle
• Dual Analog Comparators