RV1106G3

RV1106 is a highly integrated vision processor SoC designed for IPC applications, particularly suited for AI-related use cases. It is based on a single-core ARM Cortex-A7 32-bit core with integrated NEON and FPU, featuring 32KB instruction cache and 32KB data cache, along with a 128KB unified L2 cache. The built-in NPU supports INT4/INT8/INT16 mixed-precision operations with a peak computing power of up to 0.5 or 1 TOPS. The NPU offers broad compatibility, enabling easy conversion of network models from frameworks including TensorFlow, MXNet, PyTorch, and Caffe. The RV1106 incorporates a next-generation full-hardware-architecture ISP supporting up to 5MP, with hardware accelerators for HDR, 3A, lens shading correction, 3D noise reduction, 2D noise reduction, sharpening, dehaze, gamma correction, and more. Combined with two MIPI CSI interfaces and one DVP interface, it supports simultaneous video data ingestion from three camera sensors. The built-in video encoder supports H.265/H.264 encoding and multi-stream encoding, enabling high-resolution camera video to be encoded and stored in local memory while simultaneously streaming a lower-resolution video to cloud storage. To accelerate video processing, an intelligent video engine with 22 computing units is also integrated. The RV1106 features an on-chip 16-bit DDR3L DRAM to meet high memory bandwidth demands, and further integrates a built-in RTC, power-on reset circuit, audio codec, and MAC PHY.

Key features

• Single-core ARM Cortex-A7
• Full implementation of ARM v7-A architecture instruction set
• ARM Neon Advanced SIMD
• Separate integrated Neon and FPU
• 32KB L1 instruction cache and 32KB L1 data cache
• 128KB unified L2 cache for Cortex-A7
• TrustZone technology support
• Independent voltage domain for DVFS support
• On-chip internal memory
• BootRom
• System boot support from: SPI interface