S9S08SG16E1MTGR

Key features

• 8-bit HCS08 Central Processor Unit (CPU)
• Up to 40 MHz CPU at 5.5 V to 2.7 V across temperature range of -40 °C to 85 °C and -40 °C to 105 °C
• HCS08 instruction set with added BGND instruction
• Support for up to 32 interrupt/reset sources
• On-Chip Memory
• 32 KB or 18 KB dual array flash; read/program/erase over full operating voltage and temperature
• 1984 byte random access memory (RAM)
• Security circuitry to prevent unauthorized access to RAM and flash contents
• Power-Saving Modes
• Two low-power stop modes (stop2 and stop3)
• Reduced-power wait mode
• Peripheral clock gating register can disable clocks to unused modules, thereby reducing currents
• Low power On-Chip crystal oscillator (XOSC) that can be used in low-power modes to provide accurate clock source to real time counter and LCD controller
• 100 μs typical wakeup time from stop3 mode
• Clock Source Options
• Oscillator (XOSC) — Loop-control Pierce oscillator; crystal or ceramic resonator range of 31.25 kHz to 38.4 kHz or 1 MHz to 16 MHz
• Internal Clock Source (ICS) — Internal clock source module containing a frequency-locked-loop (FLL) controlled by internal or external reference; precision trimming of internal reference allows 0.2% resolution and 2% deviation over temperature and voltage; supports bus frequencies from 1 MHz to 20 MHz
• System Protection
• COP reset with option to run from dedicated 1 kHz internal clock or bus clock
• Low-voltage warning with interrupt
• Low-voltage detection with reset
• Illegal opcode detection with reset
• Illegal address detection with reset
• Flash and RAM protection
• Development Support
• Single-wire background debug interface
• Breakpoint capability to allow single breakpoint setting during in-circuit debugging and plus two more breakpoints in On-Chip debug module
• On-Chip in-circuit emulator (ICE) debug module containing three comparators and nine trigger modes; eight deep FIFO for storing change-of-flow addresses and event-only data; debug module supports both tag and force breakpoints
• Peripherals
• LCD — Up to 4x41 or 8x37 LCD driver with internal charge pump
• ADC — Up to 16-channel, 12-bit resolution, 2.5 μs conversion time, automatic compare function, temperature sensor, internal bandgap reference channel, runs in stop3 and can wake up the system, fully functional from 5.5 V to 2.7 V
• SCI — Full duplex non-return to zero (NRZ), LIN master extended break generation, LIN slave extended break detection, wakeup on active edge
• SPI — Full-duplex or single-wire bidirectional, double-buffered transmit and receive, master or slave mode, MSB-first or LSB-first shifting
• IIC — With up to 100 kbps with maximum bus loading, multi-master operation, programmable slave address, interrupt driven byte-by-byte data transfer, supports broadcast mode and 10-bit addressing
• TPMx — One 6 channel and one 2 channel, selectable input capture, output compare, or buffered edge or center-aligned PWM on each channel
• MTIM — 8-bit counter with match register, four clock sources with prescaler dividers, can be used for periodic wakeup
• RTC — 8-bit modulus counter with binary or decimal based prescaler, three clock sources including one external source, can be used for time base, calendar, or task scheduling functions
• KBI — One keyboard control module capable of supporting 8x8 keyboard matrix
• IRQ — External pin for wakeup from low-power modes
• Input/Output
• 39, 53, or 69 GPIOs
• 8 KBI and 1 IRQ interrupt with selectable polarity
• Hysteresis and configurable pullup device on all input pins, configurable slew rate and drive strength on all output pins
• Package Options
• 48-pin LQFP, 64-pin LQFP, and 80-pin LQFP