SI53361-B-GMR
1.71V~3.63V 200MHz 8 QFN-16-EP(3x3) Clock Buffers, Drivers RoHS
Low-Jitter, LVCMOS Fanout Clock Buffers with up to 12 outputs and Frequency Range from dc to 200 MHz
- Manufacturer
- SILICON LABS
- Manufacturer part #
- SI53361-B-GMR
- Store part #
- C2672875
- Package / case
- QFN-16-EP(3x3)
- Category
- Clock Buffers, Drivers
- Packaging
- Tape & Reel (TR)
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement · policy
1,256 in stock
#C2672875
Stock & price checked 5 days ago
| Quantity | Unit price | Pack price |
|---|---|---|
| 1+ | ₹334.86 | ₹334.86 |
| 10+ | ₹307.70 | ₹3,077.00 |
| 30+ | ₹290.76 | ₹8,722.80 |
| 100+ | ₹273.37 | ₹27,337.00 |
| 500+ | ₹265.54 | ₹1,32,770.00 |
| 1,000+ | ₹262.06 | ₹2,62,060.00 |
1 × ₹334.86
₹334.86
excl. GST
₹395.13 incl. 18% GST
- Dispatch in 7–10 working days
- GST invoice with every order
- Standard pack: 1,000 per reel
SI53361-B-GMR
₹334.86 for 1 + GST
Specifications
- Operating Temperature
- -40℃~+85℃
- Voltage - Supply
- 1.71V~3.63V
- Features
- Output enable/shutdown
- Number of Inputs
- 2
- Output Frequency(Max)
- 200MHz
- Number of outputs
- 8
Packaging & compliance
- RoHS
- ROHS Compliant
- Lifecycle
- Active
- ECCN
- EAR99
- Packaging
- Tape & Reel (TR)
- Standard pack
- 1,000 / Reel
- Sold per
- Piece
- Minimum order
- 1
- Unit weight
- 0.001 g
Overview
The Si53360/61/62/65 family of LVCMOS fanout buffers is ideal for clock/data distribution and redundant clocking applications. The family utilizes Silicon Labs advanced CMOS technology to fanout clocks from dc to 200 MHz with guaranteed low additive jitter, low skew, and low propagation delay variability. Built-in LDOs deliver high PSRR performance and eliminates the need for external components simplifying low jitter clock distribution in noisy environments. The CMOS buffers are available in multiple configurations with 8 outputs (Si53360/61/65), or dual banks of 6 outputs each (Si53362). These buffers can be paired with the Si534x clock generators and Si5xx oscillators to deliver end-to-end clock tree performance.
Key features
- Low additive jitter: 120 fs rms
- Built-in LDOs for high PSRR performance
- Up to 12 LVCMOS Outputs from LVCMOS inputs
- Frequency range: dc to 200 MHz
- Multiple configuration options
- Dual Bank option
- 2:1 Input MUX option
- RoHS compliant, Pb-free
- Temperature range: -40 to +85 °C
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