SN65HVD102RGBR

The SN65HVD101 and 'HVD102 IO-Link PHYs enable an IO-Link interface for industrial point-to-point communication. When this device is connected to an IO-Link master device through a 3-wire interface, the master device can initiate communication and exchange data with the remote node, while the SN65HVD10X acts as a complete communication physical layer. The IO-Link driver output (CQ) can be used in push-pull high-side or low-side configurations using the EN and TX input pins. The PHY receiver converts the 24V IO-Link signal on the CQ pin to a standard logic level on the RX pin. A simple parallel interface is used to receive and transmit data and status information between the PHY and the local controller. The SN65HVD101 and 'HVD102 implement protection features against overcurrent, overvoltage, and overheat conditions. An external resistor can be used to set the IO-Link driver current limit. If a short-circuit current fault occurs, the driver output is internally limited, and the PHY generates an error signal (SC). These drivers also implement an overheat shutdown feature that protects the device from high-temperature faults. The SN65HVD102 operates from a single 3.3V or 5V local power supply. The SN65HVD101 integrates a linear regulator that generates 3.3V or 5V from the IO-Link L+ voltage to power the PHY, a local controller, and additional circuitry. For space-constrained applications, the SN65HVD101 and 'HVD102 are available in a 20-pin QFN package (4mm×3.5mm QFN).

Applications

• Suitable for IO-Link device nodes

Key features

• Configurable CQ output: push-pull high-side or low-side remote wake-up indicator, current limit indicator, power-good indicator for SIO mode
• Overtemperature protection, reverse polarity protection
• Configurable current limit
• 9V to 36V supply range, 50V peak line voltage withstand
• 3.3V/5V configurable integrated LDO (SN65HVD101 only)
• 20-pin QFN package, 4mm x 3.5mm