STM32F071CBT6TR

Arm-based 32-bit MCU, up to 128 KB Flash, 12 timers, ADC, DAC and communication interfaces, 2.0 - 3.6 V

Key features

• Core: Arm 32-bit Cortex-M0 CPU, frequency up to 48 MHz
• Memories – 64 to 128 Kbytes of Flash memory – 16 Kbytes of SRAM with HW parity
• CRC calculation unit
• Reset and power management – Digital and supply: VDD = 2.0 V to 3.6 V – Analog supply: VDDA = VDD to 3.6 V – Selected I/Os; VDDIO2 = 1.65 V to 3.6 V – Power-on/Power down reset (POR/PDR) – Programmable voltage detector (PVD) – Low power modes: Sleep, Stop, Standby – VBAT supply for RTC and backup registers
• Clock management – 4 to 32 MHz crystal oscillator – 32 kHz oscillator for RTC with calibration – Internal 8 MHz RC with x6 PLL option – Internal 40 kHz RC oscillator – Internal 48 MHz oscillator with automatic trimming based on ext. synchronization
• Up to 87 fast I/Os – All mappable on external interrupt vectors – Up to 68 I/Os with 5V tolerant capability and 19 with independent supply VDDIO2
• 7-channel DMA controller
• One 12-bit, 1.0 μs ADC (up to 16 channels) – Conversion range: 0 to 3.6 V – Separate analog supply: 2.4 V to 3.6 V
• One 12-bit D/A converter (with 2 channels)
• 2 fast low-power analog comparators with programmable input and output
• Up to 24 capacitive sensing channels for touchkey, linear and rotary touch sensors
• Calendar RTC with alarm and periodic wakeup from Stop/Standby
• One 16-bit advanced-control timer for six-channel PWM output
• One 32-bit and seven 16-bit timers, with up to four IC/OC, OCN, usable for IR control decoding or DAC control
• Independent and system watchdog timers
• SysTick timer
• Communication interfaces 2 I²C interfaces supporting Fast Mode Plus (1 Mbit/s) with 20 mA current sink, one supporting SMBus/PMBus and wakeup 4 USARTs supporting master synchronous SPI and modem control, two with ISO7816 interface, LIN, IrDA, auto baud rate detection and wakeup feature 2 SPIs (18 Mbit/s) with 4 to 16 programmable bit frames, and with I²S interface multiplexed
• HDMI CEC, wakeup on header reception
• Serial wire debug (SWD)
• 96-bit unique ID All packages ECOPACK2