TPS3840DL41DBVRQ1

The TPS3840-Q1 series voltage monitor/reset IC operates at high voltage levels while maintaining very low quiescent current across the full VDD and temperature range. The TPS3840-Q1 delivers an optimal combination of low power consumption, high accuracy, and low propagation delay (tp_HL = 30μs typical). The reset output signal is asserted when the voltage on VDD falls below the negative voltage threshold (VIT-) or when manual reset is pulled to logic low (VMR_). The reset signal is deasserted when VDD rises above VIT- plus hysteresis (VIT+), the manual reset (MR̄) is floating or above VMR_H, and the reset delay time (tD) has expired. The reset delay time can be programmed by connecting a capacitor between the CT pin and ground. For fast reset, the CT pin can be left floating. Additional features include: low power-on reset voltage (VPOR), built-in glitch suppression protection for MR̄ and VDD, built-in hysteresis, and low open-drain output leakage current (ILKG(OD)). The TPS3840-Q1 is an ideal voltage monitoring solution for automotive applications and battery-powered/low-power applications.

Applications

• Automotive head units and instrument clusters
• Automotive displays, integrated cockpits, and driver monitoring
• Telematics control units and emergency call systems

Key features

• Qualified for automotive applications with the following characteristics per AEC-Q100:
• Device temperature grade 1: -40℃ to +125℃ ambient operating temperature range
• Device HBM ESD classification level 2
• Device CDM ESD classification level C7B
• Wide operating voltage range: 1.5V to 10V
• Extended input voltage range via external resistors
• Nanopower supply current: 350nA (typical), 700nA (maximum)
• Fixed threshold voltage (V_IT-), threshold range 1.6V to 4.9V (in 0.1V steps), high accuracy: 1% (typical), 1.5% (maximum)
• Built-in hysteresis (V_IT+):
• 1.6V < V_IT ≤ 3.0V = 100mV (typical)
• 3.1V ≤ V_IT < 4.9V = 200mV (typical)
• Fast startup delay (t_START): 350μs (maximum)
• Capacitor-based programmable reset delay time:
• tD: 50μs (no capacitor) to 6.2s (10μF)
• Active-low manual reset (MR)
• Three output topologies:
• TPS3840DL-Q1: open-drain, active-low (RESET)
• TPS3840PL-Q1: push-pull, active-low (RESET)
• TPS3840PH-Q1: push-pull, active-high (RESET)
• Package: 5-pin SOT-23 (DBV)