XMC8P53S6

8-bit OTP MCU, the XMC8P53 is a low-power, high-speed CMOS 8-bit MCU featuring a RISC instruction set with 57 instructions. It integrates a 1K × 13-bit one-time programmable read-only memory (OTP-ROM) and provides an additional 8 × 13-bit code information area to meet diverse user requirements.

Key features

• 57 instructions, 13-bit instruction width
• 2K×13-bit on-chip ROM
• 48×8-bit on-chip RAM
• 5-level stack for subroutine nesting
• Current <3.5mA@5V/16MHz
• Current <2mA@5V/8MHz
• Current <1.5mA@5V/4MHz
• Current <1mA@5V/1MHz
• Typical 1uA@sleep mode
• 1 bidirectional I/O port: P6
• 6 I/O pins
• Configurable wake-up port: P6
• Configurable external interrupt: P60
• Configurable external low-level reset: P63
• 3 programmable pull-down I/O pins
• 6 programmable pull-up I/O pins
• 6 programmable open-drain I/O pins
• 2.0V~5.5V@0°C~70°C (commercial grade), 2.0V~5.5V@-40°C~85°C (industrial grade)
• Programmable prescaler (assignable to either TCC or WDT at one time)
• 8-bit real-time clock/counter (TCC) with programmable clock source and trigger edge selection, overflow generates interrupt
• Programmable watchdog timer (WDT)
• Power-on reset and 6-level programmable low-voltage reset
• Instruction cycle: 2 clock cycles
• Program protection bit
• 3 available interrupt sources: TCC overflow interrupt, external interrupt, input port state change interrupt