74AUP2G32GXX

Schmitt trigger 800mV~3.6V 6.4ns@3.3V,30pF 500nA X2-SON-8(0.8x1.4) Gates and Inverters RoHS

X2-SON-8(0.8x1.4)ROHS3 CompliantActive

Low-power dual 2-input OR gate

Manufacturer: Nexperia
Manufacturer part #: 74AUP2G32GXX
Store part #: C546117
Package / case: X2-SON-8(0.8x1.4)
Category: Gates and Inverters
Packaging: Tape & Reel (TR)

Datasheet (PDF)

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100 in stock

#C546117

Stock & price checked 3 days ago

Quantity	Unit price	Pack price
1+	₹67.05	₹67.05
10+	₹65.33	₹653.30
30+	₹64.26	₹1,927.80
100+	₹63.17	₹6,317.00

Quantity (min 1)

1 × ₹67.05

₹67.05

excl. GST

₹79.12 incl. 18% GST

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Standard pack: 10,000 per reel

74AUP2G32GXX

₹67.05 for 1 + GST

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Specifications

Input Type: Schmitt trigger
Logic Family: 74AUP Series
Voltage - Supply: 800mV~3.6V
Output Logic Level - Low: 310mV;440mV
Propagation Delay: 6.4ns@3.3V,30pF
Features: Local shutdown mode;Overvoltage-tolerant input
Input Logic Level - Low: 700mV~900mV
Input Logic Level - High: 1.6V~2V
Operating Temperature: -40℃~+125℃
Output Logic Level - High: 1.11V;1.32V;2.05V;1.9V;2.72V;2.6V
Quiescent Current(Iq): 500nA
Number of Channels: 2;2
Current - Output High(IOH): 4mA
Current - Output Low(IOL): 4mA

Packaging & compliance

RoHS: ROHS3 Compliant
Lifecycle: Active
ECCN: EAR99
Packaging: Tape & Reel (TR)
Standard pack: 10,000 / Reel
Sold per: Piece
Minimum order: 1
Unit weight: 0.021 g

Overview

The 74AUP2G32 is a dual 2-input OR gate. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Key features

Wide supply voltage range from 0.8 V to 3.6 V
CMOS low power dissipation
High noise immunity
Low static power consumption; ICC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Overvoltage tolerant inputs to 3.6 V
Low noise overshoot and undershoot <10 % of VCC
IOFF circuitry provides partial Power-down mode operation
Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8C (2.7 V to 3.6 V)
ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃