74CBTLV3126DS,118

The 74CBTLV3126 provides a 4-bit high-speed bus switch with separate output enable inputs (1OE to 4OE). The low on-state resistance of the switch allows connections to be made with minimal propagation delay. The switch is disabled (high-impedance OFF-state) when the output enable (nOE) input is LOW. To ensure the high-impedance OFF-state during power-up or power-down, nOE should be tied to the GND through a pull-down resistor. The minimum value of the resistor is determined by the current-sinking capability of the driver. Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 2.3 V to 3.6 V. This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

Applications

• Signal routing and switching
• Communication systems
• Data transmission equipment
• Test and measurement equipment
• Audio and video equipment
• Computer peripherals
• Industrial control equipment
• Medical devices
• Consumer electronics
• Portable devices
• Sensor interfaces
• Battery management systems
• Power management systems
• Low-power applications
• Partial power-down applications

Key features

• Supply voltage range from 2.3 V to 3.6 V
• Standard '126'-type pinout
• High noise immunity
• Complies with JEDEC standard: JESD8-5 (2.3 V to 2.7 V) JESD8-B/JESD36 (2.7 V to 3.6 V)
• 5 Ω switch connection between two ports
• Rail to rail switching on data I/O ports
• CMOS low power consumption
• Latch-up performance exceeds 250 mA per JESD78B Class I level A
• IOFF circuitry provides partial Power-down mode operation
• ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
• Multiple package options
• Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃