Varnitronics
74HCT273PW,118 Nexperia
Nexperia

74HCT273PW,118

4.5V~5.5V 8 1 30ns@4.5V,50pF TSSOP-20 Flip Flops RoHS

TSSOP-20ROHS3 CompliantActive

Octal D-type flip-flop with reset; positive-edge trigger

Manufacturer
Nexperia
Manufacturer part #
74HCT273PW,118
Store part #
C513294
Package / case
TSSOP-20
Category
Flip Flops
Packaging
Tape & Reel (TR)
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

1,765 in stock

#C513294

Stock & price checked 5 days ago

QuantityUnit pricePack price
5+₹44.03₹220.15
50+₹34.66₹1,733.00
150+₹30.64₹4,596.00
500+₹25.64₹12,820.00
2,500+₹23.40₹58,500.00
5,000+₹22.07₹1,10,350.00

5 × ₹44.03

₹220.15

excl. GST

₹259.78 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 7–10 working days
  • GST invoice with every order
  • Standard pack: 2,500 per reel

74HCT273PW,118

₹220.15 for 5 + GST

Specifications

Voltage - Supply
4.5V~5.5V
Number of Bits per Element
8
Output Type
Push-Pull
Operating Temperature
-40℃~+125℃
Series
74HCT Series
Synchronous/Asynchronous
Asynchronous
Number of Elements
1
Current - Output High(IOH)
4mA
Current - Output Low(IOL)
5.2mA
Setup Time
12ns
Quiescent Current
8uA
Hold Time
3ns
Propagation Delay
30ns@4.5V,50pF
Trigger Type
Rising Edge

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
EAR99
Packaging
Tape & Reel (TR)
Standard pack
2,500 / Reel
Sold per
Piece
Minimum order
5 (multiples of 5)
Unit weight
0.216 g

Overview

The 74HC273; 74HCT273 is an octal positive-edge triggered D-type flip-flop. The device features clock (CP) and master reset (MR) inputs. The outputs Qn will assume the state of their corresponding Dn inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock (CP) transition. A LOW on MR forces the outputs LOW independently of clock and data inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.

Key features

  • Wide supply voltage range from 2.0 V to 6.0 V
  • CMOS low power dissipation
  • High noise immunity
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
  • Complies with JEDEC standards: JESD8C (2.7 V to 3.6 V) JESD7A (2.0 V to 6.0 V)
  • Input levels: For 74HC273: CMOS level; For 74HCT273: TTL level
  • Common clock and master reset
  • Eight positive edge-triggered D-type flip-flops
  • ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V
  • Multiple package options
  • Specified from -40 ℃ to +85 ℃ and from -40 ℃ to +125 ℃

Alternatives

Similar parts — check the datasheet before substituting.

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