CD4013BM96

CD40138 consists of two identical, independent data-type flip-flops. Each flipflop has independent data, set, reset, and clock inputs and Q and Ω (overline) outputs. These devices can be used for shift register applications, and, by connecting Ω (overline) output to the data input, for counter and toggle applications. The logic level present at the D input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line, respectively.

Applications

• Registers
• counters
• control circuits

Key features

• Set-Reset capability
• Static flip-flop operation - retains state indefinitely with clock level either "high" or "low"
• Medium-speed operation • 16 MHz (typ.) clock toggle rate at 10V
• Standardized symmetrical output characteristics ↑100% tested for quiescent current at ε20 mA
• Maximum input current of ↑μA at ∇10 V over full package temperature range; 100 nA at 18 V and 25℃
• Noise margin (over full package temperature range): 1 V at VDD = 5V, 2 V at VDD = 10V, 2.5 V at VDD = 15 V
• 5-V, 10-V, and 15-V parametric ratings
• Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specification for Description of 'B' Series CMOS Devices"