Varnitronics
74LVC11PW-TP TECH PUBLIC
TECH PUBLIC

74LVC11PW-TP

Schmitt trigger 1.65V~3.6V 7.5ns@3.6V,15pF TSSOP-14 Gates and Inverters

TSSOP-14RoHSActive
Manufacturer
TECH PUBLIC
Manufacturer part #
74LVC11PW-TP
Store part #
C54561844
Package / case
TSSOP-14
Packaging
Tape & Reel (TR)
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

2,435 in stock

#C54561844

Stock & price checked 28 h ago

QuantityUnit pricePack price
5+₹32.98₹164.90
50+₹25.80₹1,290.00
150+₹22.72₹3,408.00
500+₹18.87₹9,435.00
2,500+₹17.16₹42,900.00
5,000+₹16.13₹80,650.00

5 × ₹32.98

₹164.90

excl. GST

₹194.58 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 7–10 working days
  • GST invoice with every order
  • Standard pack: 2,500 per reel

74LVC11PW-TP

₹164.90 for 5 + GST

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Specifications

Input Type
Schmitt trigger
Logic Family
74LVC
Input Logic Level - Low
120mV;700mV;800mV
Operating Temperature
-40℃~+125℃
Input Logic Level - High
1.08V;1.7V;2V
Output Logic Level - High
1.2V;1.9V;2.2V;2.4V;2.8V
Voltage - Supply
1.65V~3.6V
Number of Channels
3;3
Propagation Delay
7.5ns@3.6V,15pF
Output Logic Level - Low
100mV;450mV;300mV;400mV;550mV

Packaging & compliance

RoHS
RoHS
Lifecycle
Active
Moisture sensitivity
MSL 1 (unlimited)
Packaging
Tape & Reel (TR)
Standard pack
2,500 / Reel
Sold per
Piece
Minimum order
5 (multiples of 5)
Unit weight
0.184 g

Overview

This device provides three 3-input AND gate functions. The inputs can be driven by 3.0 V or 3.6 V devices. This feature allows these devices to be used as translators in mixed 3.0 V and 3.6 V environments. Schmitt-trigger action on all inputs enables the circuit to tolerate slower input rise and fall times. This device is fully specified for partial-power-down applications using IOFF. The IOFF circuit disables the outputs, preventing damaging reverse-current flow through the device when it is powered down.

Key features

  • Wide supply voltage range: 1.2 V ~ 3.6 V
  • CMOS low power consumption
  • Overvoltage-tolerant inputs up to 5.5 V
  • Latch-up performance exceeds 250 mA
  • Direct TTL-level interface capability
  • ESD protection: HBM ANSI/ESDA/JEDEC JS-00 Class 3A exceeds 6000 V, CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
  • I<sub>OFF</sub> circuitry enables partial power-down mode operation
  • JEDEC standards compliant: JESD8-7 (1.65 V ~ 1.95 V), JESD8-5 (2.3 V ~ 2.7 V), JESD8C (2.7 V ~ 3.6 V)
  • Package: TSSOP-14

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