TI
SN74LVC1G08DCKR1.65V~5.5V 3.6ns@3.3V 10uA SC-70-5 Gates and Inverters RoHS
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₹7.06
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NexperiaDatasheet (PDF)
74LVC2G86GXX
Schmitt trigger 1.65V~5.5V 4uA X2-SON-8(0.8x1.4) Gates and Inverters RoHS
X2-SON-8(0.8x1.4)ROHS3 CompliantActive
Dual 2-input EXCLUSIVE-OR gate
- Manufacturer
- Nexperia
- Manufacturer part #
- 74LVC2G86GXX
- Store part #
- C548688
- Package / case
- X2-SON-8(0.8x1.4)
- Category
- Gates and Inverters
- Packaging
- Tape & Reel (TR)
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement · policy
212 in stock
#C548688
Stock & price checked 5 days ago
| Quantity | Unit price | Pack price |
|---|---|---|
| 1+ | ₹104.49 | ₹104.49 |
| 10+ | ₹84.91 | ₹849.10 |
| 30+ | ₹75.33 | ₹2,259.90 |
| 100+ | ₹65.53 | ₹6,553.00 |
| 500+ | ₹59.87 | ₹29,935.00 |
| 1,000+ | ₹56.82 | ₹56,820.00 |
1 × ₹104.49
₹104.49
excl. GST
₹123.30 incl. 18% GST
- Dispatch in 15-18 working days
- GST invoice with every order
- Standard pack: 10,000 per reel
74LVC2G86GXX
₹104.49 for 1 + GST
Specifications
- Input Type
- Schmitt trigger
- Logic Family
- 74LVC
- Voltage - Supply
- 1.65V~5.5V
- Propagation Delay
- 3.8ns@1.65V,30pF;2.5ns@2.3V,30pF;3ns@2.7V,50pF;2.3ns@3.0V,50pF;1.9ns@4.5V,50pF
- Output Logic Level - Low
- 550mV;800mV
- Features
- Local shutdown mode;Overvoltage-tolerant input
- Input Logic Level - Low
- 700mV;800mV
- Operating Temperature
- -40℃~+125℃
- Input Logic Level - High
- 1.7V;2V
- Output Logic Level - High
- 2.3V;3.8V
- Quiescent Current(Iq)
- 4uA
- Number of Channels
- 2;2
- Current - Output High(IOH)
- 32mA
- Current - Output Low(IOL)
- 32mA
Packaging & compliance
- RoHS
- ROHS3 Compliant
- Lifecycle
- Active
- ECCN
- EAR99
- Packaging
- Tape & Reel (TR)
- Standard pack
- 10,000 / Reel
- Sold per
- Piece
- Minimum order
- 1
- Unit weight
- 0.024 g
Overview
The 74LVC2G86 is a dual 2-input EXCLUSIVE-OR gate. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Applications
- Level translation in mixed 3.3 V and 5 V environments
- High noise immunity
- Direct TTL-level interface
Key features
- Wide supply voltage range from 1.65 V to 5.5 V
- Overvoltage tolerant inputs to 5.5 V
- High noise immunity
- CMOS low-power dissipation
- ±24 mA output drive (VCC = 3.0 V)
- Latch-up performance exceeds 250 mA
- Direct interface with TTL levels
- IOFF circuitry provides partial Power-down mode operation
- Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8C (2.7 V to 3.6 V) JESD36 (4.5 V to 5.5 V)
- ESD protection:
- HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
- CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
- Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃
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