ROHM
BR25G128FJ-3GE2
128Kbit 20MHz SPI SOIC-8 Memory RoHS
SOIC-8ROHS3 CompliantActive
128Kbit SPI Interface Serial EEPROM
Datasheet (PDF)
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement · policy
2,449 in stock
#C2061438
Stock & price checked 5 days ago
| Quantity | Unit price | Pack price |
|---|---|---|
| 1+ | ₹70.90 | ₹70.90 |
| 10+ | ₹56.60 | ₹566.00 |
| 30+ | ₹49.23 | ₹1,476.90 |
| 100+ | ₹42.07 | ₹4,207.00 |
| 500+ | ₹37.73 | ₹18,865.00 |
| 1,000+ | ₹35.56 | ₹35,560.00 |
1 × ₹70.90
₹70.90
excl. GST
₹83.66 incl. 18% GST
- Dispatch in 7–10 working days
- GST invoice with every order
- Standard pack: 2,500 per reel
BR25G128FJ-3GE2
₹70.90 for 1 + GST
Specifications
- Operating Temperature
- -40℃~+85℃
- Features
- Hardware write protection function;Built-in power-on reset (POR);Noise suppression function
- Memory Size
- 128Kbit
- Voltage - Supply
- 1.6V~5.5V;2mA
- Clock Frequency
- 20MHz
- Data Retention - TDR (Year)
- 100 Years
- Write Cycle Time(tWC)
- 5ms
- Standby Supply Current
- 0.1uA
- Write Cycle Endurance
- 1,000,000 cycles
- Interface
- SPI
Packaging & compliance
- RoHS
- ROHS3 Compliant
- Lifecycle
- Active
- ECCN
- EAR99
- Packaging
- Tape & Reel (TR)
- Standard pack
- 2,500 / Reel
- Sold per
- Piece
- Minimum order
- 1
- Unit weight
- 0.001 g
Overview
28-3 is a 128Kbit Serial EEPROM of SPI BUS Inte
Key features
- High Speed Clock Action up to 20MHz (Max)
- Wait Function by HOLDB Terminal
- Part or Whole of Memory Arrays Settable as Read only Memory Area by Program
- 1.6V to 5.5V Single Power Source Operation Most Suitable for Battery Use.
- Up to 64 Bytes in Page Write Mode.
- For SPI Bus Interface (C POL,CPHA)=(0, 0),(1, 1)
- Self-timed Programming Cycle
- Low Current Consumption At Write Action (5V) : 0.5mA (Typ) At Read Action (5V) : 2.0mA (Typ) At Standby Action (5V) : 0.1μA (Typ)
- Address Auto Increment Function at Read Action
- Prevention of Write Mistake
- Write Prohibition at Power On
- Write Prohibition by Command Code (WRDI)
- Write Prohibition by WPB Pin
- Write Prohibition Block Setting by Status Registers (BP1, BP0)
- Prevention of Write Mistake at Low Voltage
- More than 100 years Data Retention.
- More than 1 Million Write Cycles.
- Bit Format 16Kx8
- Initial Delivery Data Memory Array: FFh Status Register: WPEN, BP1, BP0 : 0
Alternatives
Similar parts — check the datasheet before substituting.
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