CAT25512VI-GT3

The CAT25512 is a 512−Kb Serial CMOS EEPROM device internally organized as 64Kx8 bits. This features a 128−byte page write buffer and supports the Serial Peripheral Interface (SPI) protocol. The device is enabled through a Chip Select (CS) input. In addition, the required bus signals are clock input (SCK), data input (SI) and data output (SO) lines. The HOLD input may be used to pause any serial communication with the CAT25512 device. The device features software and hardware write protection, including partial as well as full array protection. On−Chip ECC (Error Correction Code) makes the device suitable for high reliability applications.

Key features

• 20 MHz SPI Compatible
• 1.8 V to 5.5 V Supply Voltage Range
• SPI Modes (0,0) & (1,1)
• 128−byte Page Write Buffer
• Additional Identification Page with Permanent Write Protection
• Self−timed Write Cycle
• Hardware and Software Protection
• Block Write Protection − Protect 1/4, 1/2 or Entire EEPROM Array
• Low Power CMOS Technology
• 4,000,000 Program/Erase Cycles
• 200 Year Data Retention
• Industrial and Extended Temperature Range
• PDIP, SOIC, TSSOP 8−lead, UDFN 8−pad and WLCSP 8−ball Packages
• This Device is Pb−Free, Halogen Free/BFR Free, and RoHS Compliant