Varnitronics
TI

CD4030BNSR

3V~18V 100ns@15V,50pF 5uA SO-14-208mil Gates and Inverters RoHS

SO-14-208milROHS3 CompliantActive

CMOS Quad Exclusive-OR Gate

Manufacturer
TI
Manufacturer part #
CD4030BNSR
Store part #
C2861258
Package / case
SO-14-208mil
Packaging
Tape & Reel (TR)
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

1,289 in stock

#C2861258

Stock & price checked 5 days ago

QuantityUnit pricePack price
1+₹94.54₹94.54
10+₹81.52₹815.20
30+₹72.42₹2,172.60
100+₹64.84₹6,484.00
500+₹62.45₹31,225.00
1,000+₹60.94₹60,940.00

1 × ₹94.54

₹94.54

excl. GST

₹111.56 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 7–10 working days
  • GST invoice with every order
  • Standard pack: 2,000 per reel

CD4030BNSR

₹94.54 for 1 + GST

Specifications

Logic Family
CD4
Voltage - Supply
3V~18V
Propagation Delay
100ns@15V,50pF
Output Logic Level - Low
50mV
Operating Temperature
-55℃~+125℃
Input Logic Level - High
3.5V;7V;11V
Input Logic Level - Low
1.5V;3V;4V
Output Logic Level - High
4.95V;9.95V;14.95V
Quiescent Current(Iq)
5uA
Current - Output High(IOH)
6.8mA
Number of Channels
4;2
Current - Output Low(IOL)
6.8mA

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
EAR99
Packaging
Tape & Reel (TR)
Standard pack
2,000 / Reel
Sold per
Piece
Minimum order
1
Unit weight
0.346 g

Overview

CD4030B types consist of four in. dependent Exclusive-OR gates. The CD40308 provides the system designer with a means for direct implementation of the ExclusiveOR function.

Applications

  • Even and odd - parity generators and checkers
  • Logical comparators
  • Adders/subtractors
  • General logic functions

Key features

  • Medium-speed operation - tpHL, tPLH = 65 ns (typ.) at VDD = 10V, CL = 50 pF
  • 100% tested for quiescent current at 20 V
  • Standardized, symmetrical output characteristics
  • 5-V, 10-V, and 15-V parametric ratings
  • Maximum input current of 1 μA at 18 V over full package - temperature range; 100 Ω at 18 V and 25℃
  • Noise margin (over full package - temperature range): 1 V at VDD = 5 V, 2 V at VDD = 10 V, 2.5 V at VDD = 15 V
  • Meets all requirements of JEDEC Tentative Standard No. 138, "Standard Specifications for Description of Φ'B Series CMOS Devices"

Alternatives

Similar parts — check the datasheet before substituting.

CD4070BNSR#C2867163TI · SO-14-208milPrice on requestQuote

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