Varnitronics
CD74HC123PWR TI
TI

CD74HC123PWR

Schmitt trigger TSSOP-16 Multivibrators RoHS

TSSOP-16ROHS3 CompliantActive

High-Speed CMos Logic Dual Retriggerable Monostable Multivibrators with Resets

Manufacturer
TI
Manufacturer part #
CD74HC123PWR
Store part #
C352823
Package / case
TSSOP-16
Packaging
Tape & Reel (TR)
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

3,103 in stock

#C352823

Stock & price checked 5 days ago

QuantityUnit pricePack price
1+₹86.39₹86.39
10+₹69.21₹692.10
30+₹60.71₹1,821.30
100+₹52.23₹5,223.00
500+₹47.22₹23,610.00
1,000+₹44.61₹44,610.00

1 × ₹86.39

₹86.39

excl. GST

₹101.94 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
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  • Standard pack: 2,000 per reel

CD74HC123PWR

₹86.39 for 1 + GST

Specifications

Input Type
Schmitt trigger
Logic Type
Monostable
Number Of Channels
2

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
EAR99
Packaging
Tape & Reel (TR)
Standard pack
2,000 / Reel
Sold per
Piece
Minimum order
1
Unit weight
0.206 g

Overview

The ’HC123, ’HCT123, CD74HC423 and CD74HCT423 are dual monostable multivibrators with resets. They are all retriggerable and differ only in that the 123 types can be triggered by a negative to positive reset pulse; whereas the 423 types do not have this feature. An external resistor (Rx) and an external capacitor (Cx) control the timing and the accuracy for the circuit. Adjustment of Rx and Cx provides a wide range of output pulse widths from the Q and Q(overline) terminals. Pulse triggering on the A(overline) and B inputs occur at a particular voltage level and is not related to the rise and fall times of the trigger pulses. Once triggered, the output pulse width may be extended by retriggering inputs A(overline) and B. The output pulse can be terminated by a LOW level on the Reset (R) pin. Trailing edge triggering (A(overline)) and leading edge triggering (B) inputs are provided for triggering from either edge of the input pulse. If either Mono is not used each input on the unused device (A, B, and R) must be terminated high or low. The minimum value of external resistance, Rx is typically 5kΩ. The minimum value external capacitance, CX, is 0pF. The calculation for the pulse width is tW = 0.45 * Rx * Cx at VCC = 5V.

Key features

  • Overriding Reset Terminates Output Pulse
  • Triggering From the Leading or Trailing Edge
  • Q and Q(overline) Buffered Outputs
  • Separate Resets
  • Wide Range of Output-Pulse Widths
  • Schmitt Trigger on Both A and B Inputs
  • Fanout (Over Temperature Range) - Standard Outputs: 10 LSTTL Loads - Bus Driver Outputs: 15 LSTTL Loads
  • Wide Operating Temperature Range: -55℃ to 125℃
  • Balanced Propagation Delay and Transition Times
  • Significant Power Reduction Compared to LSTTL Logic ICs
  • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, N1H = 30% of VCC at Vcc = 5V
  • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, V//L = 0.8V (Max), V//H = 2V (Min) - CMOS Input Compatibility, || ≤ 1 || A at V0L, V0H

Alternatives

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