
DS28E01P-100+T
1Kbit 2.8V~5.25V Single bus TSOC-6 Memory RoHS
1Kb Protected 1-Wire EEPROM with SHA-1 Engine
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement · policy
8,230 in stock
#C143315
Stock & price checked 6 days ago
| Quantity | Unit price | Pack price |
|---|---|---|
| 1+ | ₹223.00 | ₹223.00 |
| 10+ | ₹190.29 | ₹1,902.90 |
| 30+ | ₹169.87 | ₹5,096.10 |
| 100+ | ₹139.88 | ₹13,988.00 |
| 500+ | ₹130.30 | ₹65,150.00 |
| 1,000+ | ₹126.14 | ₹1,26,140.00 |
1 × ₹223.00
₹223.00
excl. GST
₹263.14 incl. 18% GST
- Dispatch in 7–10 working days
- GST invoice with every order
- Standard pack: 4,000 per reel
DS28E01P-100+T
₹223.00 for 1 + GST
Specifications
- Operating Temperature
- -40℃~+85℃
- Features
- Page write protection function;Noise suppression function
- Memory Size
- 1Kbit
- Voltage - Supply
- 2.8V~5.25V
- Clock Frequency
- 15.3kHz;90.9kHz
- Data Retention - TDR (Year)
- 40 Years
- Write Cycle Endurance
- 200,000 cycles
- Interface
- Single bus
Packaging & compliance
- RoHS
- ROHS3 Compliant
- Lifecycle
- Active
- ECCN
- EAR99
- Packaging
- Tape & Reel (TR)
- Standard pack
- 4,000 / Reel
- Sold per
- Piece
- Minimum order
- 1
- Unit weight
- 0.384 g
Overview
The DS28E01-100 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1). The 1024-bit EEPROM array is configured as four pages of 256 bits with a 64-bit scratchpad to perform write operations. All memory pages can be write protected, and one page can be put in EPROM-emulation mode, where bits can only be changed from a 1 to a 0 state. Each DS28E01-100 has its own guaranteed unique 64-bit ROM registration number that is factory lasered into the chip. The DS28E01- 100 communicates over the single-contact 1-Wire® bus. The communication follows the standard 1-Wire protocol with the registration number acting as the node address in the case of a multidevice 1-Wire network.
Applications
- Printer Cartridge Configuration and Monitoring
- Medical Sensor Authentication and Calibration System
- Intellectual Property Protection
Key features
- 1024 Bits of EEPROM Memory Partitioned Into Four Pages of 256 Bits
- On-Chip 512-Bit SHA-1 Engine to Compute 160-Bit Message Authentication Codes (MACs) and to Generate Secrets
- Write Access Requires Knowledge of the Secret and the Capability of Computing and Transmitting a 160-Bit MAC as Authorization
- User-Programmable Page Write Protection for Page 0, Page 3, or All Four Pages Together
- User-Programmable OTP EPROM Emulation Mode for Page 1 (“Write to 0”)
- Communicates to Host with a Single Digital Signal at 15.3kbps or 90.9kbps Using 1-Wire Protocol
- Switchpoint Hysteresis and Filtering to Optimize Performance in the Presence of Noise
- Reads and Writes Over 2.8V to 5.25V Voltage Range from -40℃ to ±85℃
- 6-Lead TSOC and TDFN or 2-Lead TO-92 and SFN Packages
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