FEP24C32YSOP8G/TR

FEP24C32 is an industry-standard electrically erasable programmable read-only memory device that communicates via an industry-standard two-wire interface. The device contains a 32K-bit (4096×8) memory array organized in 32-byte pages. The EEPROM operates over a wide voltage range of 1.65V ~ 5.5V, suitable for most applications. The product offers low-power operation and low standby current. The device is available in lead-free, RoHS-compliant, halogen-free or green packages. Available package types include 8-pin SOIC, TSSOP, UDFN, MSOP, and SOT23. The FEP24C32 is compatible with the standard I²C bus protocol. This simple bus consists of a serial clock and a serial data signal. Using this bus protocol, a master device (such as a microcontroller) can typically control one or more slave devices, such as the FEP24C32. The bit stream over the SDA line contains a series of bytes that identify a specific slave device, the instruction, the address within that slave device, and a sequence of data (if applicable). The FEP24C32 also provides write protection via the WP pin to prevent overwriting data stored in the memory array. To prevent the state machine from entering an erroneous state during power-up sequences or power switching, the device incorporates an internal power-on reset circuit. During power-up, the device will not respond to any commands until the supply voltage VCC reaches an acceptable stable level above the reset threshold voltage. Once VCC exceeds the power-on reset threshold, the device is reset and enters standby mode. This also prevents any inadvertent write operations during the power-up phase. During power-down, once VCC falls below the power-on reset threshold voltage, the device enters standby mode. Furthermore, after receiving a Stop command, the device will remain in standby mode as long as no internal write operation is in progress. However, issuing commands is not permitted unless VCC is within its operating voltage range.

Key features

• Two-wire serial interface, I²C compatible — bidirectional data transfer protocol
• Wide operating voltage range
• VCC = 1.65V ~ 5.5V
• Speed: 1 MHz (1.65V ~ 5.5V)
• Standby current (max): 1 μA at 5.5V
• Read current (max): 0.5 mA at 5.5V
• Write current (max): 0.8 mA at 5.5V
• Hardware data protection — write protect pin
• Sequential and random read
• Memory organization: 32 Kb (4096 × 8)
• Page size: 32 bytes
• Page write mode
• Partial page write supported
• Self-timed write cycle: 5 ms (max)
• Input noise suppression, Schmitt trigger inputs
• High reliability
• Endurance: 1,000,000 write cycles
• Data retention: 100 years
• Industrial grade
• Packages: SOIC, TSSOP, UDFN, SOT23, MSOP
• Lead-free, RoHS compliant, halogen-free, green