IS25LP040E-JYLA3-TR

The IS25LP/WP040E/020E/010E/512E/025E and Serial Flash memory offers a versatile storage solution with high flexibility and performance in a simplified pin count package. The device is accessed through a 4-wire SPI Interface consisting of a Serial Data Input (SI), Serial Data Output (SO), Serial Clock (SCK), and Chip Enable (CE#) pins, which can also be configured to serve as multi-I/O. The device supports Dual and Quad I/O as well as standard, Dual Output, and Quad Output SPI. Clock frequencies of up to 104MHz allow for equivalent clock rates of up to 416MHz (104MHz x 4) which equates to 52Mbytes/s of data throughput. These transfer rates can outperform 16-bit Parallel Flash memories allowing for efficient memory access to support XIP (execute in place) operation. The memory array is organized into programmable pages of 256-bytes. This family supports page program mode where 1 to 256 bytes of data are programmed in a single command. QPI (Quad Peripheral Interface) supports 2- cycle instruction further reducing instruction times. Pages can be erased in groups of 4Kbyte sectors, 32Kbyte blocks, 64Kbyte blocks, and/or the entire chip. The uniform sector and block architecture allows for a high degree of flexibility so that the device can be utilized for a broad variety of applications requiring solid data retention.

Key features

• Industry Standard Serial Interface
• IS25LP040E: 4Mbit/512Kbyte
• IS25WP040E: 4Mbit/512Kbyte
• IS25LP020E: 2Mbit/256Kbyte
• IS25WP020E: 2Mbit/256Kbyte
• IS25LP010E: 1Mbit/128Kbyte
• IS25WP010E: 1Mbit/128Kbyte
• IS25LP512E: 512Kbit/64Kbyte
• IS25WP512E: 512Kbit/64Kbyte
• IS25LP025E: 256Kbit/32Kbyte
• IS25WP025E: 256Kbit/32Kbyte
• 256 bytes per Programmable Page
• Supports standard SPI, Multi-I/O SPI, and QPI
• Supports Serial Flash Discoverable Parameters (SFDP)
• High Performance Serial Flash (SPI)
• 50MHz Normal and 104Mhz Fast Read - 416 MHz equivalent QPI
• Supports SPI Modes 0 and 3
• More than 100,000 Erase/Program Cycles
• More than 20-year Data Retention
• Flexible & Efficient Memory Architecture
• Chip Erase with Uniform Sector/Block Erase (4/32/64 Kbyte)
• Program 1 to 256 Bytes per Page
• Program/Erase Suspend & Resume
• Soft RESET & In-Band RESET
• Efficient Read and Program modes
• XIP Read Operation; Dual I/O & Quad IO Read with AX mode
• Continuous Read & Wrap Burst Read (8/16/32/64-Byte)
• Program Operation during Erase Suspend Mode
• Low Power with Wide Temp. Ranges
• Single Voltage Supply: IS25LP: 2.30V to 3.60V IS25WP: 1.70V to 1.95V
• 6 mA Active Read Current
• 17 μA Standby Current
• μA Deep Power Down
• Temp Grades: Extended: -40℃ to +105℃ Auto Grade (A3): -40℃ to +125℃
• Advanced Security Protection
• Software and Hardware Write Protection
• Power Supply Lock Protect
• 4x256-Byte Dedicated Security Area with OTP User-lockable Bits
• 128 bit Unique ID for Each Device (Call Factory)
• Industry Standard Pin-out & Packages
• B=8 -pin SOIC 208mil (Call Factory)
• N=8 -pin SOIC 150mil
• D=8 -pin TSSOP (Call Factory)
• =8 -pin VVSOP 150mil (Call Factory)
• K=8 -contact WSON 6x5mm (Call Factory)
• Y=8 -contact USON 2x3mm
• KGD (Call Factory)