LK8563S

The LK8563 is a low-power CMOS RTC/calendar chip featuring a programmable clock output, an interrupt output, and a power-down detector. All addresses and data are transferred serially via the IIC bus interface. The maximum bus speed is 400Kbits/s, and the built-in word address register auto-increments after each read/write operation. The LK8563 incorporates 16 8-bit registers, an auto-increment address register, a built-in 32.768kHz oscillator (with an internal integrated capacitor), a frequency divider (providing the clock source for the RTC), a programmable clock output, a timer, an alarm, a power-down detector, and a 400kHz I²C bus interface. All 16 registers are designed as addressable 8-bit parallel registers, though not all bits are utilized. The first two registers (internal addresses 00H and 01H) serve as control and status registers; addresses 02H–08H are used for clock counters (seconds-to-years counters); addresses 09H–0CH are used for alarm registers (defining alarm conditions); address 0DH controls the output frequency of the CLKOUT pin; addresses 0EH and 0FH serve as the timer control register and timer register, respectively. The seconds, minutes, hours, day, month, year, minute alarm, hour alarm, and day alarm registers are encoded in BCD format, while the weekday and weekday alarm registers are not encoded in BCD format.

Applications

• Portable media players
• Fax machines
• Mobile phones
• Security electronics
• Multi-rate energy meters
• IC card water meters
• IC card gas meters

Key features

• Seconds, minutes, hours, day of week, date, month, and year timekeeping based on 32.768kHz crystal
• Century flag
• Wide operating voltage range: 1.2~5.5V
• I²C bus slave address: read, 0A3H; write, 0A2H
• Programmable clock output frequencies: 32.768kHz, 1024Hz, 32Hz, 1Hz
• Alarm and timer
• Power-fail detector
• Internal integrated oscillator capacitor
• Open-drain interrupt pin
• SOP and MSOP packages