MX25V80066M2I02

MX25V80066 is 8Mb bits Serial NOR Flash memory, which is configured as 1,048,576x8 internally. MX25V80066 features a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus while it is in single I/O mode. The three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). Serial access to the device is enabled by CS# input. When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. The MX25V80066 MXSMIO (Serial Multi I/O) provides sequential read operation on the whole chip. After program/erase command is issued, auto program/erase algorithms which program/erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page (256 bytes) basis, or word basis. Erase command is executed on 4K-byte sector, or 32KB block (32K-byte), or 64K-byte block, or whole chip basis. To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detec

Key features

• Supports Serial Peripheral Interface -- Mode 0 and Mode 3
• 8,388,608 x 1 bit structure or 4,194,304 x 2 bits (Dual Output mode) structure
• Equal Sectors with 4K byte each, Equal Blocks with 32K byte each, or Equal Blocks with 64K byte each
• Any Block can be erased individually
• Single Power Supply Operation
• Operation Voltage: 2.3V - 3.6V for Read, Erase and Program Operations
• Latch-up protected to 100mA from -1V to Vcc +1V
• High Performance - Fast read - 1 I/O: 80MHz with 8 dummy cycles - 1I/2O: 80MHz with 8 dummy cycles, equivalent to 160MHz
• Fast program and erase time
• Low Power Consumption
• Typical 100,000 erase/program cycles
• 20 years data retention
• Input Data Format: 1-byte Command code
• Advanced Security Features: Block lock protection
• The BP0 - BP3 status bit defines the size of the area to be software protection against program and erase instructions
• Auto Erase and Auto Program Algorithm: Automatically erases and verifies data at selected sector or block
• Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pulse widths (Any page to be programed should have page in the erased state first)
• Status Register Feature
• Electronic Identification: JEDEC 1-byte manufacturer ID and 2-byte device ID
• RES command for 1-byte Device ID
• REMS command for 1-byte manufacturer ID and 1-byte device ID
• Support Serial Flash Discoverable Parameters (SFDP) mode
• SCLK Input: Serial clock input
• SI/SIO0: Serial Data Input or Serial Data Input/Output for 2 x I/O read mode
• SO/SIO1: Serial Data Output or Serial Data Input/Output for 2 x I/O read mode
• WP#: Hardware write protection
• PACKAGE: 8-pin SOP (150mil)
• 8-pin SOP (200mil)
• 8-land USON (2x3mm)
• 8-land WSON (6x5mm)
• All devices are RoHS Compliant and Halogen free