PCM5122PWR

The PCM512x devices belong to a family of monolithic CMOS integrated circuits, consisting of a stereo digital-to-analog converter (DAC) and additional support circuitry in a thin shrink small-outline package (TSSOP). The PCM512x uses the latest generation of advanced segmented DAC architecture products, enabling excellent dynamic performance and improved tolerance to clock jitter. Members of the PCM512x family integrate preset audio processing features with programmable coefficients, allowing developers to change the characteristics of the interpolation filter, speaker EQ, dynamic range control, and average volume control within their products. The PCM512x provides a 2.1 V_RMS center-tapped output (eliminating the need for DC-blocking capacitors on the output) and a traditional external mute circuit associated with single-supply line drivers. The integrated line driver supports loads as low as 1 kΩ, outperforming all other charge-pump-based line drivers in terms of performance. The PCM512x supports loads as low as 1 kΩ and can actually drive up to 10 parallel products (such as LCD TVs, DVD players, and AV receivers). The integrated PLL on the device eliminates the need for a system clock (commonly referred to as the master clock), enabling a 3-wire I²S connection while reducing system electromagnetic interference (EMI).

Applications

• A/V receivers
• DVD, BD players
• HDTV receivers
• Applications requiring 2 V_RMS audio output

Key features

• Register-selectable automatic processing up to 48kHz
• fS dynamic range control (DRC), equalization (EQ), filtering
• DAC functionality (fS up to 384kHz)
• Low out-of-band noise
• Selectable digital filter delay and performance
• No DC-blocking capacitors required
• Integrated negative charge pump
• Intelligent mute system; soft ramp-up/ramp-down with analog mute for 120dB mute SNR
• Integrated high-performance audio PLL with BCK reference for internal SCK generation
• Accepts 16-bit, 20-bit, 24-bit, and 32-bit audio data
• PCM data formats: I2S, left-justified, right-justified, TDM/DSP
• SPI or I2C control
• Software or hardware configuration
• Automatic power-saving mode when LRCK and BCK are disabled
• 1.8V or 3.3V fail-safe LVCMOS digital inputs
• Single-supply operation: 3.3V analog, 1.8V or 3.3V digital
• Integrated power-on reset
• 28-pin compact package