SN74AC74DR

The ’AC74 devices are dual positive-edge triggered D-type flip-flops. A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at D can be changed without affecting the levels at the outputs.

Key features

• Operating supply voltage range: 2V to 6V
• Inputs withstand up to 6V
• Maximum propagation delay tpd of 10ns at 5V supply
• Maximum rated supply voltage range: -0.5V to 7V
• Maximum input voltage range: -0.5V to VCC+0.5V
• Maximum output voltage range: -0.5V to VCC+0.5V
• Input clamp current: ±20mA max
• Output clamp current: ±20mA max
• Continuous output current: ±50mA max
• Continuous current through VCC or GND: ±200mA max
• Thermal resistance by package: D package 86°C/W, DB package 96°C/W, N package 80°C/W, NS package 76°C/W, PW package 113°C/W
• Storage temperature range: -65°C to 150°C
• Multiple package options available: J, W, D, DB, N, NS, PW, FK
• No internal connection (NC) pins present