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SN74LVC1G08DCKR1.65V~5.5V 3.6ns@3.3V 10uA SC-70-5 Gates and Inverters RoHS
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₹7.06
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TECH PUBLICDatasheet (PDF)
SN74LVC11APWR-TP
Schmitt trigger 10nA 1.1V~3.6V 4.6ns@3.6V,15pF TSSOP-14 Gates and Inverters
TSSOP-14RoHSActive
- Manufacturer
- TECH PUBLIC
- Manufacturer part #
- SN74LVC11APWR-TP
- Store part #
- C54561940
- Package / case
- TSSOP-14
- Category
- Gates and Inverters
- Packaging
- Tape & Reel (TR)
Every Order Guarantee
100% Authentic · 30-Day Return or Replacement · policy
2,450 in stock
#C54561940
Stock & price checked 6 days ago
| Quantity | Unit price | Pack price |
|---|---|---|
| 5+ | ₹32.98 | ₹164.90 |
| 50+ | ₹25.80 | ₹1,290.00 |
| 150+ | ₹22.72 | ₹3,408.00 |
| 500+ | ₹18.87 | ₹9,435.00 |
| 2,500+ | ₹17.16 | ₹42,900.00 |
| 5,000+ | ₹16.13 | ₹80,650.00 |
5 × ₹32.98
₹164.90
excl. GST
₹194.58 incl. 18% GST
- Dispatch in 7–10 working days
- GST invoice with every order
- Standard pack: 2,500 per reel
SN74LVC11APWR-TP
₹164.90 for 5 + GST
Specifications
- Input Type
- Schmitt trigger
- Logic Family
- 74LVC
- Input Logic Level - Low
- 120mV;700mV;800mV
- Operating Temperature
- -40℃~+125℃
- Input Logic Level - High
- 1.08V;1.7V;2V
- Output Logic Level - High
- 1.2V;1.9V;2.2V;2.4V;2.8V
- Quiescent Current(Iq)
- 10nA
- Voltage - Supply
- 1.1V~3.6V
- Number of Channels
- 3;3
- Propagation Delay
- 4.6ns@3.6V,15pF
- Output Logic Level - Low
- 100mV;450mV;300mV;400mV;550mV
Packaging & compliance
- RoHS
- RoHS
- Lifecycle
- Active
- Packaging
- Tape & Reel (TR)
- Standard pack
- 2,500 / Reel
- Sold per
- Piece
- Minimum order
- 5 (multiples of 5)
- Unit weight
- 0.193 g
Overview
Three 3-input AND functions are provided. Inputs can be driven by 3.0 V or 3.6 V devices. This feature allows these devices to be used as translators in mixed 3.0 V and 3.6 V environments. Schmitt-trigger action on all inputs enables the circuit to tolerate slower input rise and fall times. The device is fully characterized for partial-power-down applications using IOFF. The IOFF circuit disables the outputs, preventing damaging reverse current flow through the device when it is powered down.
Key features
- Wide supply voltage range: 1.1 V to 3.6 V
- CMOS low power consumption
- Overvoltage-tolerant inputs up to 5.5 V
- Latch-up performance exceeds 250 mA
- Direct TTL-level interface
- ESD protection: HBM ANSI/ESDA/JEDEC JS-003 Class A exceeds 6000 V; CDM ANSI/ESDA/JEDEC JS-002 C3 exceeds 2000 V
- I<sub>OFF</sub> circuit enables partial power-down mode operation
- JEDEC standard compliant: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V)
- Package: TSSOP-14
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