Varnitronics
SN74LVC1G374DCKR TI
TI

SN74LVC1G374DCKR

1.65V~5.5V 1 1 4ns@5V,50pF SC-70-6 Flip Flops RoHS

SC-70-6ROHS3 CompliantActive

Single D-Type Flip-Flop With 3-State Output

Manufacturer
TI
Manufacturer part #
SN74LVC1G374DCKR
Store part #
C2859827
Package / case
SC-70-6
Category
Flip Flops
Packaging
Tape & Reel (TR)
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

5,620 in stock

#C2859827

Stock & price checked 7 days ago

QuantityUnit pricePack price
5+₹23.66₹118.30
50+₹18.97₹948.50
150+₹16.70₹2,505.00
500+₹14.66₹7,330.00
3,000+₹14.10₹42,300.00
6,000+₹13.76₹82,560.00

5 × ₹23.66

₹118.30

excl. GST

₹139.59 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 7–10 working days
  • GST invoice with every order
  • Standard pack: 3,000 per reel

SN74LVC1G374DCKR

₹118.30 for 5 + GST

Specifications

Voltage - Supply
1.65V~5.5V
Number of Bits per Element
1
Output Type
Tri-State
Operating Temperature
-40℃~+125℃
Series
74LVC Series
Number of Elements
1
Current - Output High(IOH)
32mA
Current - Output Low(IOL)
32mA
Setup Time
1.5ns
Quiescent Current
10uA
Hold Time
1.5ns
Propagation Delay
4ns@5V,50pF
Trigger Type
Rising Edge

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
EAR99
Packaging
Tape & Reel (TR)
Standard pack
3,000 / Reel
Sold per
Piece
Minimum order
5 (multiples of 5)
Unit weight
0.033 g

Overview

This single D-type latch is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC1G374 features a 3-state output designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing buffer registers, input/output (I/O) ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q output is set to the logic level set up at the data (D) input. A buffered output-enable (OE(overline)) input can be used to place the output in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the output neither loads nor drives the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operations of the flipflop. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

Applications

  • buffer registers
  • input/output (I/O) ports
  • bidirectional bus drivers
  • working registers

Key features

  • Available in the Texas Instruments NanoStar and NanoFree Packages
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Provides Down Translation to VCC
  • Max tpd of 4 ns at 3.3 V
  • Low Power Consumption, 10 μA Max ICC
  • ±24 mA Output Drive at 3.3 V
  • Ioff Supports Live Insertion, Partial-Power Down Mode, and Back Drive Protection
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22 2000-V Human-Body Model (A114-A) 200-V Machine Model (A115-A) 1000-V Charged-Device Model (C101)

Same category

More in Flip Flops

View all

TI

CD4013BM96

3V~18V 1 2 90ns@15V,50pF SOIC-14 Flip Flops RoHS

From

₹31.62

94,415 in stock