Varnitronics
SN74LVC1G79DBVR TI
TI

SN74LVC1G79DBVR

1.65V~5.5V 1 1 4.5ns@5V,50pF SOT-23-5 Flip Flops RoHS

SOT-23-5ROHS3 CompliantActive

Single Positive-Edge-Triggered D-Type Flip-Flop

Manufacturer
TI
Manufacturer part #
SN74LVC1G79DBVR
Store part #
C42878
Package / case
SOT-23-5
Category
Flip Flops
Packaging
Tape & Reel (TR)
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

12,790 in stock

#C42878

Stock & price checked 6 days ago

QuantityUnit pricePack price
5+₹25.08₹125.40
50+₹19.91₹995.50
150+₹17.69₹2,653.50
500+₹14.92₹7,460.00
3,000+₹12.69₹38,070.00
6,000+₹11.95₹71,700.00

5 × ₹25.08

₹125.40

excl. GST

₹147.97 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 7–10 working days
  • GST invoice with every order
  • Standard pack: 3,000 per reel

SN74LVC1G79DBVR

₹125.40 for 5 + GST

Specifications

Voltage - Supply
1.65V~5.5V
Number of Bits per Element
1
Output Type
Push-Pull
Operating Temperature
-40℃~+125℃
Series
74LVC Series
Number of Elements
1
Current - Output High(IOH)
32mA
Current - Output Low(IOL)
32mA
Setup Time
1.3ns
Quiescent Current
10uA
Hold Time
1ns
Propagation Delay
4.5ns@5V,50pF
Trigger Type
Rising Edge

Packaging & compliance

RoHS
ROHS3 Compliant
Lifecycle
Active
ECCN
EAR99
Packaging
Tape & Reel (TR)
Standard pack
3,000 / Reel
Sold per
Piece
Minimum order
5 (multiples of 5)
Unit weight
0.055 g

Overview

The SN74LVC1G79 device is a single positive-edge-triggered D-type flip-flop that is designed for 1.65-V to 5.5-V VCC operation. When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.

Applications

  • Test and Measurement
  • Enterprise Switching
  • Telecom Infrastructure
  • Personal Electronics
  • White Goods

Key features

  • Available in the Texas Instruments NanoFree™ Package
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22:
  • 2000-V Human-Body Model (A114-A)
  • 200-V Machine Model (A115-A)
  • 1000-V Charged-Device Model (C101)
  • Supports 5-V VCC Operation
  • Inputs Accept Voltages to 5.5V
  • Supports Down Translation to VCC
  • Max tpd of 6 ns at 3.3V and 50 pF load
  • Low Power Consumption, 10 - μA Max ICC
  • ±24 - mA Output Drive at 3.3V
  • Ioff supports Partial-Power-Down Mode and Back-Drive Protection

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