TC7W74FU,LF

The TC7W74 is a high speed C²MOS D Flip Flop fabricated with silicon gate C²MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the C²MOS low power dissipation. The signal level applied to the D INPUT is transferred to Q OUTPUT during the positive going transition of the CLOCK pulse CLEAR and PRESET are independent of the CLOCK and are accomplished by setting the appropriate input to an “L” level Input is equipped with protection circuits against static discharge or transient excess voltage.

Key features

• High speed: fMAX = 77 MHz (typ.) at VCC = 5 V
• Low power dissipation: Icc = 2 μA (max) at Ta = 25°C
• High noise immunity: ΔVNIH = VNIL = 28% VCC (min)
• Output drive capability: 10 LSTTL loads
• Symmetrical output impedance: | IOH | = IOL = 4 mA (min)
• Balanced propagation delays: tpLH ≃ tpHL
• Wide operating voltage range: VCC (opr) = 2 to 6 V