W9425G6KH-5

W9425G6KH is a CMOS Double Data Rate synchronous dynamic random access memory (DDR SDRAM), organized as 4,194,304 words x 4 banks x16 bits. W9425G6KH delivers a data bandwidth of up to 400M words per second. To fully comply with the personal computer industrial standard, W9425G6KH is sorted into two speed grades: 5 and -5I. The -5 and -5I grades are compliant to the DDR400/CL3 specification (the -5I industrial grade which is guaranteed to support -40℃ ≤ TA ≤ 85℃). All Input reference to the positive edge of CLK (except for DQ, DM and CKE). The timing reference point for the differential clock is when the CLK and CLK signals cross during a transition. Write and Read data are synchronized with the both edges of DQS (Data Strobe). By having a programmable Mode Register, the system can change burst length, latency cycle, interleave or sequential burst to maximize its performance. W9425G6KH is ideal for main memory in high performance applications.

Key features

• 2.5V ± 0.2V Power Supply for DDR400
• Up to 200 MHz Clock Frequency
• Double Data Rate architecture; two data transfers per clock cycle
• Differential clock inputs (CLK and CLK)
• DQS is edge-aligned with data for Read; center-aligned with data for Wr