Nexperia

74AUP2G132DC,125

Schmitt trigger 800mV~3.6V 7.8ns@3.6V,30pF 500nA VSSOP-8-0.5mm Gates and Inverters RoHS

VSSOP-8-0.5mmROHS3 CompliantActive

Low-power dual 2-input NAND Schmitt trigger

Manufacturer: Nexperia
Manufacturer part #: 74AUP2G132DC,125
Store part #: C546071
Package / case: VSSOP-8-0.5mm
Category: Gates and Inverters
Packaging: Tape & Reel (TR)

Datasheet (PDF)

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14,348 in stock

#C546071

Stock & price checked 7 days ago

Quantity	Unit price	Pack price
1+	₹64.32	₹64.32
10+	₹51.07	₹510.70
30+	₹45.42	₹1,362.60
100+	₹38.47	₹3,847.00
500+	₹35.43	₹17,715.00
1,000+	₹33.47	₹33,470.00

Quantity (min 1)

1 × ₹64.32

₹64.32

excl. GST

₹75.90 incl. 18% GST

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Dispatch in 7–10 working days
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Standard pack: 3,000 per reel

74AUP2G132DC,125

₹64.32 for 1 + GST

Specifications

Input Type: Schmitt trigger
Logic Family: 74AUP
Voltage - Supply: 800mV~3.6V
Propagation Delay: 7.8ns@3.6V,30pF
Output Logic Level - Low: 440mV
Features: Local shutdown mode;Overvoltage-tolerant input
Operating Temperature: -40℃~+125℃
Output Logic Level - High: 2.6V
Quiescent Current(Iq): 500nA
Number of Channels: 2;2
Current - Output High(IOH): 4mA
Current - Output Low(IOL): 4mA

Packaging & compliance

RoHS: ROHS3 Compliant
Lifecycle: Active
ECCN: EAR99
Packaging: Tape & Reel (TR)
Standard pack: 3,000 / Reel
Sold per: Piece
Minimum order: 1
Unit weight: 0.035 g

Overview

The 74AUP2G132 is a dual 2-input NAND gate with Schmitt-trigger inputs. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using lOFF. The lOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.

Applications

Wave and pulse shaper
Astable multivibrator
Monostable multivibrator

Key features

Wide supply voltage range from 0.8 V to 3.6 V
CMOS low power dissipation
High noise immunity
Low static power consumption; lCC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Overvoltage tolerant inputs to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial Power-down mode operation
Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V), JESD8-11 (0.9 V to 1.65 V), JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃

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