74AVCH2T45DC,125-JSM

The 74AVCH2T45 is a dual-bit, dual-supply transceiver supporting bidirectional voltage-level translation. The device features two data input/output ports (nA and nB), a direction control input (DIR), and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be powered at any voltage between 0.8V and 3.6V, making the device suitable for translation between any low-voltage nodes (0.8V, 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V). Pins nA and DIR are referenced to VCC(A), while pin nB is referenced to VCC(B). A HIGH on DIR enables data transmission from nA to nB; a LOW on DIR enables transmission from nB to nA. The device fully supports partial power-down applications using IOFF. The IOFF circuitry disables the outputs to prevent damaging backflow current when the device is powered down. When either VCC(A) or VCC(B) is at GND in power-off mode, both port A and port B enter a high-impedance off state. The 74AVCH2T45 incorporates an active bus-hold circuit that maintains unused or floating data inputs at a valid logic level, eliminating the need for external pull-up or pull-down resistors.

Key features

• Wide supply voltage range: VCC(A): 0.8V ~ 3.6V; VCC(B): 0.8V ~ 3.6V
• Maximum data rate: 500 Mbps (1.8V to 3.3V translation); 320 Mbps (below 1.8V to 3.3V translation); 320 Mbps (translation to 2.5V or 1.8V); 280 Mbps (translation to 1.5V); 240 Mbps (translation to 1.2V)
• Suspend mode
• Bus-hold on data inputs
• Inputs tolerant up to 3.6V
• IOFF circuitry supports partial power-down operation
• Operating temperature range: -40℃ ~ +125℃
• Package: VSSOP8