74HC164D

The 74HC164 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB) and eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB; either input can serve as an active-HIGH enable for data entry through the other input. Data is shifted on the LOW-to-HIGH transition of the clock (CP) input. A LOW on the master reset input (MR̄) clears the register and forces all outputs LOW, independent of all other inputs. Clamp diodes on the inputs allow input interfacing to voltages exceeding VCC using current-limiting resistors.

Key features

• Wide supply voltage range: 2.0V ~ 6.0V
• High noise immunity
• CMOS low power consumption
• Gated serial data input
• Asynchronous master reset
• Latch-up performance exceeds 250mA
• JEDEC compliant: JESD8C (2.7V to 3.6V), JESD7A (2.0V to 6.0V)
• ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 3500V; CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000V
• Multiple package options
• Operating temperature range: -40°C ~ +85°C and -40°C ~ +125°C