74HC594D

The 74HC594 is an 8-bit serial-in, serial- or parallel-out shift register with a storage register. Both the shift register and storage register have separate clock and reset inputs. The device features a serial input (DS) and a serial output (Q7S) for cascading. Data is shifted on the low-to-high transition of the SHCP input, and data in the shift register is transferred to the storage register on the low-to-high transition of the STCP input. If the two clocks are connected together, the shift register will always be one clock pulse ahead of the storage register. A low level on either of the two register reset pins (SHR and STR) clears the corresponding register. Inputs include clamping diodes, allowing inputs to be connected to voltages exceeding VCC using current-limiting resistors.

Applications

• Serial-to-parallel data conversion
• Remote control hold register

Key features

• Synchronous serial input and output
• 8-bit parallel output
• Shift register and storage register with separate direct clear and clock
• Independent clocks for shift register and storage register
• Wide supply voltage range: 2.0 V ~ 6.0 V
• CMOS low power consumption
• High noise immunity
• Latch-up performance exceeds 250 mA
• JEDEC compliant:
• JESD8C (2.7 V ~ 3.6 V)
• JESD7A (2.0 V ~ 6.0 V)
• ESD protection:
• HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 3500 V
• CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
• Multiple package options
• Operating temperature range: -40°C ~ +85°C and -40°C ~ +125°C