Varnitronics
74LVC08APW MDD(Microdiode Semiconductor)
MDD(Microdiode Semiconductor)

74LVC08APW

Schmitt trigger 1.65V~5.5V 3.3ns@4.5V,15pF 10nA TSSOP-14L Gates and Inverters

TSSOP-14LRoHSActive
Manufacturer part #
74LVC08APW
Store part #
C54411084
Package / case
TSSOP-14L
Packaging
Tape & Reel (TR)
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

4,610 in stock

#C54411084

Stock & price checked 6 days ago

QuantityUnit pricePack price
5+₹20.23₹101.15
50+₹15.86₹793.00
150+₹13.98₹2,097.00
500+₹11.64₹5,820.00
2,500+₹10.61₹26,525.00
5,000+₹9.98₹49,900.00

5 × ₹20.23

₹101.15

excl. GST

₹119.36 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 7–10 working days
  • GST invoice with every order
  • Standard pack: 2,500 per reel

74LVC08APW

₹101.15 for 5 + GST

Specifications

Input Type
Schmitt trigger
Logic Family
74LVC
Voltage - Supply
1.65V~5.5V
Propagation Delay
3.3ns@4.5V,15pF
Output Logic Level - Low
450mV;300mV;400mV;550mV
Input Logic Level - Low
700mV;800mV
Operating Temperature
-40℃~+125℃
Input Logic Level - High
1.7V;2V
Output Logic Level - High
1.2V;1.9V;2.2V;2.4V;3.8V
Quiescent Current(Iq)
10nA
Number of Channels
4;2

Packaging & compliance

RoHS
RoHS
Lifecycle
Active
Packaging
Tape & Reel (TR)
Standard pack
2,500 / Reel
Sold per
Piece
Minimum order
5 (multiples of 5)
Unit weight
0.265 g

Overview

The 74LVC08A is a quad 2-input AND gate. Inputs can be driven by 3.3V or 5V devices. This feature allows use of these devices as translators in mixed 3.3V and 5V applications. Schmitt-trigger action on all inputs enables the circuit to tolerate slower input rise and fall times. The device is fully specified for partial power-down applications using IOFF. The IOFF circuit disables the outputs, preventing potentially damaging backflow current through the device when it is powered down.

Key features

  • Wide supply voltage range: 1.2V to 5.5V
  • Input overvoltage tolerance up to 5.5V
  • CMOS low power consumption
  • Latch-up performance exceeds 250mA
  • Direct TTL-level interface
  • IOFF circuit for partial power-down mode operation
  • JEDEC standard compliant:
  • JESD8-7 (1.65V to 1.95V)
  • JESD8-5 (2.3V to 2.7V)
  • JESD8C (2.7V to 3.6V)
  • JESD36 (4.5V to 5.5V)
  • ESD protection:
  • HBM ANSI/ESDA/JEDEC JS-001 Class 3A exceeds 6000V
  • CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000V
  • Multiple package options

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