Varnitronics
74LVC1G14GV MDD(Microdiode Semiconductor)
MDD(Microdiode Semiconductor)

74LVC1G14GV

Schmitt trigger 1.65V~5.5V 2.9ns@5V,50pF 4uA 1 SOT-23-5L Gates and Inverters

SOT-23-5LRoHSActive
Manufacturer part #
74LVC1G14GV
Store part #
C52140412
Package / case
SOT-23-5L
Packaging
Tape & Reel (TR)
Datasheet (PDF)

Every Order Guarantee

100% Authentic · 30-Day Return or Replacement · policy

4,861 in stock

#C52140412

Stock & price checked 6 days ago

QuantityUnit pricePack price
1+₹11.95₹11.95
10+₹9.42₹94.20
30+₹8.15₹244.50
100+₹7.21₹721.00
500+₹6.44₹3,220.00
1,000+₹6.07₹6,070.00

1 × ₹11.95

₹11.95

excl. GST

₹14.10 incl. 18% GST

Need volume or a scheduled delivery? Request a quote
  • Dispatch in 7–10 working days
  • GST invoice with every order
  • Standard pack: 3,000 per reel

74LVC1G14GV

₹11.95 for 1 + GST

Specifications

Input Type
Schmitt trigger
Logic Family
74LVC
Voltage - Supply
1.65V~5.5V
Propagation Delay
2.9ns@5V,50pF
Output Logic Level - Low
70mV;120mV;170mV;330mV;390mV
Features
Power shutdown protection;Noise suppression function
Operating Temperature
-40℃~+125℃
Output Logic Level - High
1.54V;2.15V;2.5V;2.62V;4.11V
Quiescent Current(Iq)
4uA
Current - Output High(IOH)
24mA
Number of Channels
1
Current - Output Low(IOL)
24mA

Packaging & compliance

RoHS
RoHS
Lifecycle
Active
Packaging
Tape & Reel (TR)
Standard pack
3,000 / Reel
Sold per
Piece
Minimum order
1
Unit weight
1 g

Overview

The 74LVC1G14 is a single Schmitt-trigger inverter. Its inputs can be driven by 3.3V or 5V devices, making it suitable as a level translator in mixed 3.3V/5V environments. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output when the device is powered down, preventing potentially damaging backflow current from flowing through the device.

Key features

  • Wide supply voltage range: 1.65 V to 5.5 V
  • Overvoltage-tolerant inputs up to 5.5 V
  • High noise immunity
  • ±24 mA output drive capability (at VCC = 3.0 V)
  • CMOS low power consumption
  • Latch-up performance exceeds 100 mA
  • Direct TTL-level interface capability
  • IOFF circuit supports partial power-down mode operation
  • Unlimited rise and fall times
  • Compliant with JEDEC standards: JESD8-7 (1.65 V to 1.95 V), JESD8-5 (2.3 V to 2.7 V), JESD8C (2.7 V to 3.6 V), JESD36 (4.5 V to 5.5 V)
  • ESD protection: HBM ANSI/ESDA/JEDEC JS-001 Class 3B exceeds 8000 V, MM JESD22-A115C Class C exceeds 550 V, CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 2000 V
  • Multiple package options

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